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Commit 6ec4bcb7 authored by Hamad Kadmany's avatar Hamad Kadmany Committed by Maya Erez
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wil6210: TX vring optimization



Tx vring needs to be enlarged to get better
performance for traffic over 2Gbps.

Change-Id: Ia78ddf6f5243a8d28c3bfdfc29e0eb512658d0a7
Signed-off-by: default avatarHamad Kadmany <qca_hkadmany@qca.qualcomm.com>
Signed-off-by: default avatarMaya Erez <qca_merez@qca.qualcomm.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
Git-commit: ee5dfe0d240e21afe63bdd77bf1d4a386203aa6e
Git-repo: https://github.com/kvalo/ath.git


CRs-Fixed: 982882
Signed-off-by: default avatarMaya Erez <merez@codeaurora.org>
parent 645dc2b1
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+3 −3
Original line number Diff line number Diff line
/*
 * Copyright (c) 2012-2015 Qualcomm Atheros, Inc.
 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
@@ -68,13 +68,13 @@ static void wil_print_vring(struct seq_file *s, struct wil6210_priv *wil,
		seq_puts(s, "???\n");
	}

	if (vring->va && (vring->size < 1025)) {
	if (vring->va && (vring->size <= (1 << WIL_RING_SIZE_ORDER_MAX))) {
		uint i;

		for (i = 0; i < vring->size; i++) {
			volatile struct vring_tx_desc *d = &vring->va[i].tx;

			if ((i % 64) == 0 && (i != 0))
			if ((i % 128) == 0 && (i != 0))
				seq_puts(s, "\n");
			seq_printf(s, "%c", (d->dma.status & BIT(0)) ?
					_s : (vring->ctx[i].skb ? _h : 'h'));
+1 −1
Original line number Diff line number Diff line
@@ -51,7 +51,7 @@ static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)

#define WIL_TX_Q_LEN_DEFAULT		(4000)
#define WIL_RX_RING_SIZE_ORDER_DEFAULT	(10)
#define WIL_TX_RING_SIZE_ORDER_DEFAULT	(10)
#define WIL_TX_RING_SIZE_ORDER_DEFAULT	(12)
#define WIL_BCAST_RING_SIZE_ORDER_DEFAULT	(7)
#define WIL_BCAST_MCS0_LIMIT		(1024) /* limit for MCS0 frame size */
/* limit ring size in range [32..32k] */