Merge "msm: mdss: Ignore overflow errors in dma_tpg_tx path" (6e51d408) · Commits · e / devices / android_kernel_xiaomi_markw

drivers/video/msm/mdss/mdss_dsi_host.c

+29 −3

Original line number	Diff line number	Diff line
		/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2012-2017,2019 The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -1533,6 +1533,7 @@ static int mdss_dsi_cmd_dma_tpg_tx(struct mdss_dsi_ctrl_pdata *ctrl,
		int len, i, ret = 0, data = 0;
		u32 *bp;
		struct mdss_dsi_ctrl_pdata *mctrl = NULL;
		int ignored = 0; /* overflow ignored */

		if (tp->len > DMA_TPG_FIFO_LEN) {
		pr_debug("command length more than FIFO length\n");
		@@ -1548,9 +1549,22 @@ static int mdss_dsi_cmd_dma_tpg_tx(struct mdss_dsi_ctrl_pdata *ctrl,
		len = ALIGN(tp->len, 4);

		reinit_completion(&ctrl->dma_comp);
		if (ctrl->panel_mode == DSI_VIDEO_MODE)
		ignored = 1;

		if (mdss_dsi_sync_wait_trigger(ctrl))
		if (mdss_dsi_sync_wait_trigger(ctrl)) {
		mctrl = mdss_dsi_get_other_ctrl(ctrl);
		if ((mctrl) && (ignored == 1)) {
		/* mask out overflow isr */
		mdss_dsi_set_reg(mctrl, 0x10c,
		0x0f0000, 0x0f0000);
		}
		}

		if (ignored) {
		/* mask out overflow isr */
		mdss_dsi_set_reg(ctrl, 0x10c, 0x0f0000, 0x0f0000);
		}

		data = BIT(16) \| BIT(17); /* select CMD_DMA_PATTERN_SEL to 3 */
		data \|= BIT(2); /* select CMD_DMA_FIFO_MODE to 1 */
		@@ -1611,6 +1625,13 @@ static int mdss_dsi_cmd_dma_tpg_tx(struct mdss_dsi_ctrl_pdata *ctrl,
		/* Disable CMD_DMA_TPG */
		MIPI_OUTP(ctrl->ctrl_base + 0x15c, 0x0);

		if (ignored) {
		/* clear pending overflow status */
		mdss_dsi_set_reg(ctrl, 0xc, 0xffffffff, 0x44440000);
		/* restore overflow isr */
		mdss_dsi_set_reg(ctrl, 0x10c, 0x0f0000, 0);
		}

		if (mctrl) {
		/* Reset the DMA TPG FIFO */
		MIPI_OUTP(mctrl->ctrl_base + 0x1ec, 0x1);
		@@ -1619,8 +1640,13 @@ static int mdss_dsi_cmd_dma_tpg_tx(struct mdss_dsi_ctrl_pdata *ctrl,
		wmb(); /* make sure FIFO reset happens */
		/* Disable CMD_DMA_TPG */
		MIPI_OUTP(mctrl->ctrl_base + 0x15c, 0x0);
		if (ignored) {
		/* clear pending overflow status */
		mdss_dsi_set_reg(mctrl, 0xc, 0xffffffff, 0x44440000);
		/* restore overflow isr */
		mdss_dsi_set_reg(mctrl, 0x10c, 0x0f0000, 0);
		}
		}

		return ret;
		}