Loading arch/arm/boot/dts/qcom/mdmfermium-cdp.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -22,3 +22,11 @@ pinctrl-names = "default"; pinctrl-0 = <&uart_console_sleep>; }; &i2c_4 { status = "ok"; }; &spi_1 { status = "ok"; }; arch/arm/boot/dts/qcom/mdmfermium-mtp.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -22,3 +22,11 @@ pinctrl-names = "default"; pinctrl-0 = <&uart_console_sleep>; }; &i2c_4 { status = "ok"; }; &spi_1 { status = "ok"; }; arch/arm/boot/dts/qcom/mdmfermium-pinctrl.dtsi +27 −0 Original line number Diff line number Diff line Loading @@ -96,5 +96,32 @@ }; i2c4 { i2c4_default: i2c4_default { /* active state */ mux { pins = "gpio18", "gpio19"; function = "blsp_i2c4"; }; config { pins = "gpio18", "gpio19"; drive-strength = <2>; bias-disable; }; }; i2c4_sleep: i2c4_sleep { /* suspended state */ mux { pins = "gpio18", "gpio19"; function = "gpio"; }; config { pins = "gpio18", "gpio19"; drive-strength = <2>; bias-pull-down; }; }; }; }; }; arch/arm/boot/dts/qcom/mdmfermium.dtsi +35 −0 Original line number Diff line number Diff line Loading @@ -60,6 +60,7 @@ smd36 = &smdtty_loopback; /* spi device */ spi1 = &spi_1; i2c4 = &i2c_4; }; cpus { Loading Loading @@ -247,6 +248,40 @@ status = "disabled"; }; dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */ #dma-cells = <4>; compatible = "qcom,sps-dma"; reg = <0x7884000 0x2b000>; interrupts = <0 238 0>; qcom,summing-threshold = <10>; }; i2c_4: i2c@78b8000 { /* BLSP1 QUP4 */ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; #size-cells = <0>; reg-names = "qup_phys_addr"; reg = <0x78b8000 0x600>; interrupt-names = "qup_irq"; interrupts = <0 98 0>; qcom,clk-freq-out = <400000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, <&clock_gcc clk_gcc_blsp1_qup4_i2c_apps_clk>; pinctrl-names = "i2c_default", "i2c_sleep"; pinctrl-0 = <&i2c4_default>; pinctrl-1 = <&i2c4_sleep>; qcom,noise-rjct-scl = <0>; qcom,noise-rjct-sda = <0>; qcom,master-id = <86>; dmas = <&dma_blsp1 18 64 0x20000020 0x20>, <&dma_blsp1 19 32 0x20000020 0x20>; dma-names = "tx", "rx"; status = "disabled"; }; usb_otg: usb@78d9000 { compatible = "qcom,hsusb-otg"; reg = <0x78d9000 0x400>, <0x6c000 0x200>; Loading Loading
arch/arm/boot/dts/qcom/mdmfermium-cdp.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -22,3 +22,11 @@ pinctrl-names = "default"; pinctrl-0 = <&uart_console_sleep>; }; &i2c_4 { status = "ok"; }; &spi_1 { status = "ok"; };
arch/arm/boot/dts/qcom/mdmfermium-mtp.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -22,3 +22,11 @@ pinctrl-names = "default"; pinctrl-0 = <&uart_console_sleep>; }; &i2c_4 { status = "ok"; }; &spi_1 { status = "ok"; };
arch/arm/boot/dts/qcom/mdmfermium-pinctrl.dtsi +27 −0 Original line number Diff line number Diff line Loading @@ -96,5 +96,32 @@ }; i2c4 { i2c4_default: i2c4_default { /* active state */ mux { pins = "gpio18", "gpio19"; function = "blsp_i2c4"; }; config { pins = "gpio18", "gpio19"; drive-strength = <2>; bias-disable; }; }; i2c4_sleep: i2c4_sleep { /* suspended state */ mux { pins = "gpio18", "gpio19"; function = "gpio"; }; config { pins = "gpio18", "gpio19"; drive-strength = <2>; bias-pull-down; }; }; }; }; };
arch/arm/boot/dts/qcom/mdmfermium.dtsi +35 −0 Original line number Diff line number Diff line Loading @@ -60,6 +60,7 @@ smd36 = &smdtty_loopback; /* spi device */ spi1 = &spi_1; i2c4 = &i2c_4; }; cpus { Loading Loading @@ -247,6 +248,40 @@ status = "disabled"; }; dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */ #dma-cells = <4>; compatible = "qcom,sps-dma"; reg = <0x7884000 0x2b000>; interrupts = <0 238 0>; qcom,summing-threshold = <10>; }; i2c_4: i2c@78b8000 { /* BLSP1 QUP4 */ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; #size-cells = <0>; reg-names = "qup_phys_addr"; reg = <0x78b8000 0x600>; interrupt-names = "qup_irq"; interrupts = <0 98 0>; qcom,clk-freq-out = <400000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, <&clock_gcc clk_gcc_blsp1_qup4_i2c_apps_clk>; pinctrl-names = "i2c_default", "i2c_sleep"; pinctrl-0 = <&i2c4_default>; pinctrl-1 = <&i2c4_sleep>; qcom,noise-rjct-scl = <0>; qcom,noise-rjct-sda = <0>; qcom,master-id = <86>; dmas = <&dma_blsp1 18 64 0x20000020 0x20>, <&dma_blsp1 19 32 0x20000020 0x20>; dma-names = "tx", "rx"; status = "disabled"; }; usb_otg: usb@78d9000 { compatible = "qcom,hsusb-otg"; reg = <0x78d9000 0x400>, <0x6c000 0x200>; Loading