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Commit 6c7b0685 authored by Sascha Hauer's avatar Sascha Hauer
Browse files

ARM i.MX: prepare for common clock framework



- Add necessary #ifdefs for CONFIG_COMMON_CLOCK
- Add a global spinlock to protect the CCM registers

Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent eb92044e
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+44 −0
Original line number Diff line number Diff line
#ifndef __MACH_IMX_CLK_H
#define __MACH_IMX_CLK_H

#include <linux/spinlock.h>
#include <linux/clk-provider.h>
#include <mach/clock.h>

struct clk *imx_clk_pllv1(const char *name, char *parent,
		void __iomem *base);

static inline struct clk *imx_clk_fixed(const char *name, int rate)
{
	return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
}

static inline struct clk *imx_clk_divider(const char *name, const char *parent,
		void __iomem *reg, u8 shift, u8 width)
{
	return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
			reg, shift, width, 0, &imx_ccm_lock);
}

static inline struct clk *imx_clk_gate(const char *name, const char *parent,
		void __iomem *reg, u8 shift)
{
	return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
			shift, 0, &imx_ccm_lock);
}

static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
		u8 shift, u8 width, const char **parents, int num_parents)
{
	return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift,
			width, 0, &imx_ccm_lock);
}

static inline struct clk *imx_clk_fixed_factor(const char *name,
		const char *parent, unsigned int mult, unsigned int div)
{
	return clk_register_fixed_factor(NULL, name, parent,
			CLK_SET_RATE_PARENT, mult, div);
}

#endif
+11 −0
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@
#include <mach/clock.h>
#include <mach/hardware.h>

#ifndef CONFIG_COMMON_CLK
static LIST_HEAD(clocks);
static DEFINE_MUTEX(clocks_mutex);

@@ -200,6 +201,16 @@ struct clk *clk_get_parent(struct clk *clk)
}
EXPORT_SYMBOL(clk_get_parent);

#else

/*
 * Lock to protect the clock module (ccm) registers. Used
 * on all i.MXs
 */
DEFINE_SPINLOCK(imx_ccm_lock);

#endif /* CONFIG_COMMON_CLK */

/*
 * Get the resulting clock rate from a PLL register value and the input
 * frequency. PLLs with this register layout can at least be found on
+4 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@
#ifndef __ASSEMBLY__
#include <linux/list.h>

#ifndef CONFIG_COMMON_CLK
struct module;

struct clk {
@@ -59,6 +60,9 @@ struct clk {

int clk_register(struct clk *clk);
void clk_unregister(struct clk *clk);
#endif /* CONFIG_COMMON_CLK */

extern spinlock_t imx_ccm_lock;

unsigned long mxc_decode_pll(unsigned int pll, u32 f_ref);