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Commit 6bf07b8e authored by Yuval Mintz's avatar Yuval Mintz Committed by David S. Miller
Browse files

bnx2x: Revise prints 



This patch revises many bnx2x prints - mainly fixing print typos and
adding some new debug prints (mostly for parity issues).

Signed-off-by: default avatarYuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: default avatarAriel Elior <ariele@broadcom.com>
Signed-off-by: default avatarEilon Greenstein <eilong@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3cdeec22

drivers/net/ethernet/broadcom/bnx2x/bnx2x.h

+0 −1
Original line number Diff line number Diff line
@@ -1900,7 +1900,6 @@ u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, 
void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae,

			       u8 src_type, u8 dst_type);

int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae);

void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl);



/* FLR related routines */

u32 bnx2x_flr_clnup_poll_count(struct bnx2x *bp);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c

+4 −4
Original line number Diff line number Diff line
@@ -2162,10 +2162,10 @@ static int bnx2x_alloc_fw_stats_mem(struct bnx2x *bp) 
	bp->fw_stats_data_mapping = bp->fw_stats_mapping +

		bp->fw_stats_req_sz;



	DP(BNX2X_MSG_SP, "statistics request base address set to %x %x",

	DP(BNX2X_MSG_SP, "statistics request base address set to %x %x\n",

	   U64_HI(bp->fw_stats_req_mapping),

	   U64_LO(bp->fw_stats_req_mapping));

	DP(BNX2X_MSG_SP, "statistics data base address set to %x %x",

	DP(BNX2X_MSG_SP, "statistics data base address set to %x %x\n",

	   U64_HI(bp->fw_stats_data_mapping),

	   U64_LO(bp->fw_stats_data_mapping));

	return 0;
@@ -2240,7 +2240,7 @@ int bnx2x_nic_load_analyze_req(struct bnx2x *bp, u32 load_code) 


		/* abort nic load if version mismatch */

		if (my_fw != loaded_fw) {

			BNX2X_ERR("bnx2x with FW %x was already loaded which mismatches my %x FW. aborting\n",

			BNX2X_ERR("bnx2x with FW %x was already loaded which mismatches my %x FW. Aborting\n",

				  loaded_fw, my_fw);

			return -EBUSY;

		}
@@ -3977,7 +3977,7 @@ int bnx2x_setup_tc(struct net_device *dev, u8 num_tc) 


	/* requested to support too many traffic classes */

	if (num_tc > bp->max_cos) {

		BNX2X_ERR("support for too many traffic classes requested: %d. max supported is %d\n",

		BNX2X_ERR("support for too many traffic classes requested: %d. Max supported is %d\n",

			  num_tc, bp->max_cos);

		return -EINVAL;

	}

drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h

+9 −7
Original line number Diff line number Diff line
@@ -55,6 +55,8 @@ do { \ 
				       GFP_KERNEL | __GFP_ZERO); \

		if (x == NULL) \

			goto alloc_mem_err; \

		DP(NETIF_MSG_HW, "BNX2X_PCI_ALLOC: Physical %Lx Virtual %p\n", \

		   (unsigned long long)(*y), x); \

	} while (0)



#define BNX2X_ALLOC(x, size) \

drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c

+2 −2
Original line number Diff line number Diff line
@@ -2381,7 +2381,7 @@ static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid, 
				*flags |= DCB_FEATCFG_ERROR;

			break;

		default:

			BNX2X_ERR("Non valid featrue-ID\n");

			BNX2X_ERR("Non valid feature-ID\n");

			rval = 1;

			break;

		}
@@ -2422,7 +2422,7 @@ static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid, 
				flags & DCB_FEATCFG_WILLING ? 1 : 0;

			break;

		default:

			BNX2X_ERR("Non valid featrue-ID\n");

			BNX2X_ERR("Non valid feature-ID\n");

			rval = 1;

			break;

		}

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

+195 −62
Original line number Diff line number Diff line
@@ -371,9 +371,11 @@ static u32 bnx2x_reg_rd_ind(struct bnx2x *bp, u32 addr) 
#define DMAE_DP_DST_PCI		"pci dst_addr [%x:%08x]"

#define DMAE_DP_DST_NONE	"dst_addr [none]"



void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl)

static void bnx2x_dp_dmae(struct bnx2x *bp,

			  struct dmae_command *dmae, int msglvl)

{

	u32 src_type = dmae->opcode & DMAE_COMMAND_SRC;

	int i;



	switch (dmae->opcode & DMAE_COMMAND_DST) {

	case DMAE_CMD_DST_PCI:
@@ -429,6 +431,10 @@ void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl) 
			   dmae->comp_val);

		break;

	}



	for (i = 0; i < (sizeof(struct dmae_command)/4); i++)

		DP(msglvl, "DMAE RAW [%02d]: 0x%08x\n",

		   i, *(((u32 *)dmae) + i));

}



/* copy command into DMAE command memory and set DMAE command go */
@@ -503,8 +509,9 @@ int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae) 
	int cnt = CHIP_REV_IS_SLOW(bp) ? (400000) : 4000;

	int rc = 0;



	/*

	 * Lock the dmae channel. Disable BHs to prevent a dead-lock

	bnx2x_dp_dmae(bp, dmae, BNX2X_MSG_DMAE);



	/* Lock the dmae channel. Disable BHs to prevent a dead-lock

	 * as long as this code is called both from syscall context and

	 * from ndo_set_rx_mode() flow that may be called from BH.

	 */
@@ -543,6 +550,7 @@ unlock: 
void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,

		      u32 len32)

{

	int rc;

	struct dmae_command dmae;



	if (!bp->dmae_ready) {
@@ -566,11 +574,16 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, 
	dmae.len = len32;



	/* issue the command and wait for completion */

	bnx2x_issue_dmae_with_comp(bp, &dmae);

	rc = bnx2x_issue_dmae_with_comp(bp, &dmae);

	if (rc) {

		BNX2X_ERR("DMAE returned failure %d\n", rc);

		bnx2x_panic();

	}

}



void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32)

{

	int rc;

	struct dmae_command dmae;



	if (!bp->dmae_ready) {
@@ -598,7 +611,11 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32) 
	dmae.len = len32;



	/* issue the command and wait for completion */

	bnx2x_issue_dmae_with_comp(bp, &dmae);

	rc = bnx2x_issue_dmae_with_comp(bp, &dmae);

	if (rc) {

		BNX2X_ERR("DMAE returned failure %d\n", rc);

		bnx2x_panic();

	};

}



static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr,
@@ -834,7 +851,7 @@ static void bnx2x_hc_int_disable(struct bnx2x *bp) 


	REG_WR(bp, addr, val);

	if (REG_RD(bp, addr) != val)

		BNX2X_ERR("BUG! proper val not read from IGU!\n");

		BNX2X_ERR("BUG! Proper val not read from IGU!\n");

}



static void bnx2x_igu_int_disable(struct bnx2x *bp)
@@ -852,7 +869,7 @@ static void bnx2x_igu_int_disable(struct bnx2x *bp) 


	REG_WR(bp, IGU_REG_PF_CONFIGURATION, val);

	if (REG_RD(bp, IGU_REG_PF_CONFIGURATION) != val)

		BNX2X_ERR("BUG! proper val not read from IGU!\n");

		BNX2X_ERR("BUG! Proper val not read from IGU!\n");

}



static void bnx2x_int_disable(struct bnx2x *bp)
@@ -1021,6 +1038,7 @@ void bnx2x_panic_dump(struct bnx2x *bp, bool disable_int) 
#ifdef BNX2X_STOP_ON_ERROR



	/* event queue */

	BNX2X_ERR("eq cons %x prod %x\n", bp->eq_cons, bp->eq_prod);

	for (i = 0; i < NUM_EQ_DESC; i++) {

		u32 *data = (u32 *)&bp->eq_ring[i].message.data;
@@ -1379,7 +1397,7 @@ static int bnx2x_poll_hw_usage_counters(struct bnx2x *bp, u32 poll_cnt) 
	/* Wait DMAE PF usage counter to zero */

	if (bnx2x_flr_clnup_poll_hw_counter(bp,

			dmae_reg_go_c[INIT_DMAE_C(bp)],

			"DMAE dommand register timed out",

			"DMAE command register timed out",

			poll_cnt))

		return 1;
@@ -1759,7 +1777,7 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe) 
		break;



	case (RAMROD_CMD_ID_ETH_TERMINATE):

		DP(BNX2X_MSG_SP, "got MULTI[%d] teminate ramrod\n", cid);

		DP(BNX2X_MSG_SP, "got MULTI[%d] terminate ramrod\n", cid);

		drv_cmd = BNX2X_Q_CMD_TERMINATE;

		break;
@@ -1971,7 +1989,7 @@ int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource) 
	/* Validating that the resource is currently taken */

	lock_status = REG_RD(bp, hw_lock_control_reg);

	if (!(lock_status & resource_bit)) {

		BNX2X_ERR("lock_status 0x%x resource_bit 0x%x. unlock was called but lock wasn't taken!\n",

		BNX2X_ERR("lock_status 0x%x resource_bit 0x%x. Unlock was called but lock wasn't taken!\n",

			  lock_status, resource_bit);

		return -EFAULT;

	}
@@ -4237,13 +4255,18 @@ static bool bnx2x_get_load_status(struct bnx2x *bp, int engine) 
	return val != 0;

}



static void _print_parity(struct bnx2x *bp, u32 reg)

{

	pr_cont(" [0x%08x] ", REG_RD(bp, reg));

}



static void _print_next_block(int idx, const char *blk)

{

	pr_cont("%s%s", idx ? ", " : "", blk);

}



static int bnx2x_check_blocks_with_parity0(u32 sig, int par_num,

					   bool print)

static int bnx2x_check_blocks_with_parity0(struct bnx2x *bp, u32 sig,

					    int par_num, bool print)

{

	int i = 0;

	u32 cur_bit = 0;
@@ -4252,33 +4275,54 @@ static int bnx2x_check_blocks_with_parity0(u32 sig, int par_num, 
		if (sig & cur_bit) {

			switch (cur_bit) {

			case AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "BRB");

					_print_parity(bp,

						      BRB1_REG_BRB1_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_PARSER_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "PARSER");

					_print_parity(bp, PRS_REG_PRS_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_TSDM_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "TSDM");

					_print_parity(bp,

						      TSDM_REG_TSDM_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_SEARCHER_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++,

							  "SEARCHER");

					_print_parity(bp, SRC_REG_SRC_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_TCM_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "TCM");

					_print_parity(bp,

						      TCM_REG_TCM_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_TSEMI_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "TSEMI");

					_print_parity(bp,

						      TSEM_REG_TSEM_PRTY_STS_0);

					_print_parity(bp,

						      TSEM_REG_TSEM_PRTY_STS_1);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "XPB");

					_print_parity(bp, GRCBASE_XPB +

							  PB_REG_PB_PRTY_STS);

				}

				break;

			}
@@ -4290,8 +4334,9 @@ static int bnx2x_check_blocks_with_parity0(u32 sig, int par_num, 
	return par_num;

}



static int bnx2x_check_blocks_with_parity1(u32 sig, int par_num,

					   bool *global, bool print)

static int bnx2x_check_blocks_with_parity1(struct bnx2x *bp, u32 sig,

					    int par_num, bool *global,

					    bool print)

{

	int i = 0;

	u32 cur_bit = 0;
@@ -4300,37 +4345,66 @@ static int bnx2x_check_blocks_with_parity1(u32 sig, int par_num, 
		if (sig & cur_bit) {

			switch (cur_bit) {

			case AEU_INPUTS_ATTN_BITS_PBF_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "PBF");

					_print_parity(bp, PBF_REG_PBF_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_QM_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "QM");

					_print_parity(bp, QM_REG_QM_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_TIMERS_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "TM");

					_print_parity(bp, TM_REG_TM_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_XSDM_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "XSDM");

					_print_parity(bp,

						      XSDM_REG_XSDM_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_XCM_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "XCM");

					_print_parity(bp, XCM_REG_XCM_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_XSEMI_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "XSEMI");

					_print_parity(bp,

						      XSEM_REG_XSEM_PRTY_STS_0);

					_print_parity(bp,

						      XSEM_REG_XSEM_PRTY_STS_1);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_DOORBELLQ_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++,

							  "DOORBELLQ");

					_print_parity(bp,

						      DORQ_REG_DORQ_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_NIG_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "NIG");

					if (CHIP_IS_E1x(bp)) {

						_print_parity(bp,

							NIG_REG_NIG_PRTY_STS);

					} else {

						_print_parity(bp,

							NIG_REG_NIG_PRTY_STS_0);

						_print_parity(bp,

							NIG_REG_NIG_PRTY_STS_1);

					}

				}

				break;

			case AEU_INPUTS_ATTN_BITS_VAUX_PCI_CORE_PARITY_ERROR:

				if (print)
@@ -4339,32 +4413,52 @@ static int bnx2x_check_blocks_with_parity1(u32 sig, int par_num, 
				*global = true;

				break;

			case AEU_INPUTS_ATTN_BITS_DEBUG_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "DEBUG");

					_print_parity(bp, DBG_REG_DBG_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_USDM_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "USDM");

					_print_parity(bp,

						      USDM_REG_USDM_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_UCM_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "UCM");

					_print_parity(bp, UCM_REG_UCM_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_USEMI_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "USEMI");

					_print_parity(bp,

						      USEM_REG_USEM_PRTY_STS_0);

					_print_parity(bp,

						      USEM_REG_USEM_PRTY_STS_1);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_UPB_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "UPB");

					_print_parity(bp, GRCBASE_UPB +

							  PB_REG_PB_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_CSDM_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "CSDM");

					_print_parity(bp,

						      CSDM_REG_CSDM_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_CCM_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "CCM");

					_print_parity(bp, CCM_REG_CCM_PRTY_STS);

				}

				break;

			}
@@ -4376,8 +4470,8 @@ static int bnx2x_check_blocks_with_parity1(u32 sig, int par_num, 
	return par_num;

}



static int bnx2x_check_blocks_with_parity2(u32 sig, int par_num,

					   bool print)

static int bnx2x_check_blocks_with_parity2(struct bnx2x *bp, u32 sig,

					    int par_num, bool print)

{

	int i = 0;

	u32 cur_bit = 0;
@@ -4386,12 +4480,23 @@ static int bnx2x_check_blocks_with_parity2(u32 sig, int par_num, 
		if (sig & cur_bit) {

			switch (cur_bit) {

			case AEU_INPUTS_ATTN_BITS_CSEMI_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "CSEMI");

					_print_parity(bp,

						      CSEM_REG_CSEM_PRTY_STS_0);

					_print_parity(bp,

						      CSEM_REG_CSEM_PRTY_STS_1);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_PXP_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "PXP");

					_print_parity(bp, PXP_REG_PXP_PRTY_STS);

					_print_parity(bp,

						      PXP2_REG_PXP2_PRTY_STS_0);

					_print_parity(bp,

						      PXP2_REG_PXP2_PRTY_STS_1);

				}

				break;

			case AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR:

				if (print)
@@ -4399,24 +4504,42 @@ static int bnx2x_check_blocks_with_parity2(u32 sig, int par_num, 
					"PXPPCICLOCKCLIENT");

				break;

			case AEU_INPUTS_ATTN_BITS_CFC_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "CFC");

					_print_parity(bp,

						      CFC_REG_CFC_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_CDU_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "CDU");

					_print_parity(bp, CDU_REG_CDU_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_DMAE_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "DMAE");

					_print_parity(bp,

						      DMAE_REG_DMAE_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "IGU");

					if (CHIP_IS_E1x(bp))

						_print_parity(bp,

							HC_REG_HC_PRTY_STS);

					else

						_print_parity(bp,

							IGU_REG_IGU_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "MISC");

					_print_parity(bp,

						      MISC_REG_MISC_PRTY_STS);

				}

				break;

			}
@@ -4470,8 +4593,8 @@ static int bnx2x_check_blocks_with_parity3(u32 sig, int par_num, 
	return par_num;

}



static int bnx2x_check_blocks_with_parity4(u32 sig, int par_num,

					   bool print)

static int bnx2x_check_blocks_with_parity4(struct bnx2x *bp, u32 sig,

					    int par_num, bool print)

{

	int i = 0;

	u32 cur_bit = 0;
@@ -4480,12 +4603,18 @@ static int bnx2x_check_blocks_with_parity4(u32 sig, int par_num, 
		if (sig & cur_bit) {

			switch (cur_bit) {

			case AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "PGLUE_B");

					_print_parity(bp,

						PGLUE_B_REG_PGLUE_B_PRTY_STS);

				}

				break;

			case AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR:

				if (print)

				if (print) {

					_print_next_block(par_num++, "ATC");

					_print_parity(bp,

						      ATC_REG_ATC_PRTY_STS);

				}

				break;

			}
@@ -4516,15 +4645,15 @@ static bool bnx2x_parity_attn(struct bnx2x *bp, bool *global, bool print, 
		if (print)

			netdev_err(bp->dev,

				   "Parity errors detected in blocks: ");

		par_num = bnx2x_check_blocks_with_parity0(

		par_num = bnx2x_check_blocks_with_parity0(bp,

			sig[0] & HW_PRTY_ASSERT_SET_0, par_num, print);

		par_num = bnx2x_check_blocks_with_parity1(

		par_num = bnx2x_check_blocks_with_parity1(bp,

			sig[1] & HW_PRTY_ASSERT_SET_1, par_num, global, print);

		par_num = bnx2x_check_blocks_with_parity2(

		par_num = bnx2x_check_blocks_with_parity2(bp,

			sig[2] & HW_PRTY_ASSERT_SET_2, par_num, print);

		par_num = bnx2x_check_blocks_with_parity3(

			sig[3] & HW_PRTY_ASSERT_SET_3, par_num, global, print);

		par_num = bnx2x_check_blocks_with_parity4(

		par_num = bnx2x_check_blocks_with_parity4(bp,

			sig[4] & HW_PRTY_ASSERT_SET_4, par_num, print);



		if (print)
@@ -7437,7 +7566,7 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) 
	} else {

		/* Set NIC mode */

		REG_WR(bp, PRS_REG_NIC_MODE, 1);

		DP(NETIF_MSG_IFUP, "NIC MODE configrued\n");

		DP(NETIF_MSG_IFUP, "NIC MODE configured\n");

	}



	if (!CHIP_IS_E1x(bp)) {
@@ -8609,7 +8738,7 @@ static int bnx2x_func_wait_started(struct bnx2x *bp) 
		struct bnx2x_func_state_params func_params = {NULL};



		DP(NETIF_MSG_IFDOWN,

		   "Hmmm... unexpected function state! Forcing STARTED-->TX_ST0PPED-->STARTED\n");

		   "Hmmm... Unexpected function state! Forcing STARTED-->TX_ST0PPED-->STARTED\n");



		func_params.f_obj = &bp->func_obj;

		__set_bit(RAMROD_DRV_CLR_ONLY,
@@ -9426,14 +9555,12 @@ static void bnx2x_sp_rtnl_task(struct work_struct *work) 
		return;

	}



	/* if stop on error is defined no recovery flows should be executed */

	if (unlikely(bp->recovery_state != BNX2X_RECOVERY_DONE)) {

#ifdef BNX2X_STOP_ON_ERROR

		BNX2X_ERR("recovery flow called but STOP_ON_ERROR defined so reset not done to allow debug dump,\n"

			  "you will need to reboot when done\n");

		goto sp_rtnl_not_reset;

#endif



	if (unlikely(bp->recovery_state != BNX2X_RECOVERY_DONE)) {

		/*

		 * Clear all pending SP commands as we are going to reset the

		 * function anyway.
@@ -9448,6 +9575,12 @@ static void bnx2x_sp_rtnl_task(struct work_struct *work) 
	}



	if (test_and_clear_bit(BNX2X_SP_RTNL_TX_TIMEOUT, &bp->sp_rtnl_state)) {

#ifdef BNX2X_STOP_ON_ERROR

		BNX2X_ERR("recovery flow called but STOP_ON_ERROR defined so reset not done to allow debug dump,\n"

			  "you will need to reboot when done\n");

		goto sp_rtnl_not_reset;

#endif



		/*

		 * Clear all pending SP commands as we are going to reset the

		 * function anyway.