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Commit 6ad58b24 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Jeff Garzik
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pata_pdc202xx_old: fix UDMA33 handling 



The original driver doesn't use 66 MHz clock for UDMA33.

[ The alternative solution would be to adjust UDMA33 timings
  for 66 MHz clock but I think that it is safer to stick with
  old & tested behavior for now. ]

Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: default avatarJeff Garzik <jgarzik@redhat.com>
parent 29b7e43c

drivers/ata/pata_pdc202xx_old.c

+3 −3
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 
 * pata_pdc202xx_old.c 	- Promise PDC202xx PATA for new ATA layer

 *			  (C) 2005 Red Hat Inc

 *			  Alan Cox <alan@lxorguk.ukuu.org.uk>

 *			  (C) 2007 Bartlomiej Zolnierkiewicz

 *			  (C) 2007,2009 Bartlomiej Zolnierkiewicz

 *

 * Based in part on linux/drivers/ide/pci/pdc202xx_old.c

 *
@@ -158,7 +158,7 @@ static void pdc2026x_bmdma_start(struct ata_queued_cmd *qc) 
	u32 len;



	/* Check we keep host level locking here */

	if (adev->dma_mode >= XFER_UDMA_2)

	if (adev->dma_mode > XFER_UDMA_2)

		iowrite8(ioread8(clock) | sel66, clock);

	else

		iowrite8(ioread8(clock) & ~sel66, clock);
@@ -212,7 +212,7 @@ static void pdc2026x_bmdma_stop(struct ata_queued_cmd *qc) 
		iowrite8(ioread8(clock) & ~sel66, clock);

	}

	/* Flip back to 33Mhz for PIO */

	if (adev->dma_mode >= XFER_UDMA_2)

	if (adev->dma_mode > XFER_UDMA_2)

		iowrite8(ioread8(clock) & ~sel66, clock);

	ata_bmdma_stop(qc);

	pdc202xx_set_piomode(ap, adev);