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Commit 6ab019b6 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

Merge tag 'omap-fixes-a-for-3.6rc' of...

Merge tag 'omap-fixes-a-for-3.6rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes

Some hwmod, clockdomain, am335x fixes against v3.6-rc4.

Test logs can be found here:

   http://www.pwsan.com/omap/testlogs/omap_fixes_a_3.6rc/20120904110254/
parents 580a7ce8 8a94febc
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+7 −7
Original line number Diff line number Diff line
@@ -1036,13 +1036,13 @@ static struct omap_clk am33xx_clks[] = {
	CLK(NULL,	"mmu_fck",		&mmu_fck,	CK_AM33XX),
	CLK(NULL,	"smartreflex0_fck",	&smartreflex0_fck,	CK_AM33XX),
	CLK(NULL,	"smartreflex1_fck",	&smartreflex1_fck,	CK_AM33XX),
	CLK(NULL,	"gpt1_fck",		&timer1_fck,	CK_AM33XX),
	CLK(NULL,	"gpt2_fck",		&timer2_fck,	CK_AM33XX),
	CLK(NULL,	"gpt3_fck",		&timer3_fck,	CK_AM33XX),
	CLK(NULL,	"gpt4_fck",		&timer4_fck,	CK_AM33XX),
	CLK(NULL,	"gpt5_fck",		&timer5_fck,	CK_AM33XX),
	CLK(NULL,	"gpt6_fck",		&timer6_fck,	CK_AM33XX),
	CLK(NULL,	"gpt7_fck",		&timer7_fck,	CK_AM33XX),
	CLK(NULL,	"timer1_fck",		&timer1_fck,	CK_AM33XX),
	CLK(NULL,	"timer2_fck",		&timer2_fck,	CK_AM33XX),
	CLK(NULL,	"timer3_fck",		&timer3_fck,	CK_AM33XX),
	CLK(NULL,	"timer4_fck",		&timer4_fck,	CK_AM33XX),
	CLK(NULL,	"timer5_fck",		&timer5_fck,	CK_AM33XX),
	CLK(NULL,	"timer6_fck",		&timer6_fck,	CK_AM33XX),
	CLK(NULL,	"timer7_fck",		&timer7_fck,	CK_AM33XX),
	CLK(NULL,	"usbotg_fck",		&usbotg_fck,	CK_AM33XX),
	CLK(NULL,	"ieee5000_fck",		&ieee5000_fck,	CK_AM33XX),
	CLK(NULL,	"wdt1_fck",		&wdt1_fck,	CK_AM33XX),
+48 −2
Original line number Diff line number Diff line
@@ -241,6 +241,52 @@ static void omap3_clkdm_deny_idle(struct clockdomain *clkdm)
		_clkdm_del_autodeps(clkdm);
}

static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm)
{
	bool hwsup = false;

	if (!clkdm->clktrctrl_mask)
		return 0;

	hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
				clkdm->clktrctrl_mask);

	if (hwsup) {
		/* Disable HW transitions when we are changing deps */
		_disable_hwsup(clkdm);
		_clkdm_add_autodeps(clkdm);
		_enable_hwsup(clkdm);
	} else {
		if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
			omap3_clkdm_wakeup(clkdm);
	}

	return 0;
}

static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm)
{
	bool hwsup = false;

	if (!clkdm->clktrctrl_mask)
		return 0;

	hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
				clkdm->clktrctrl_mask);

	if (hwsup) {
		/* Disable HW transitions when we are changing deps */
		_disable_hwsup(clkdm);
		_clkdm_del_autodeps(clkdm);
		_enable_hwsup(clkdm);
	} else {
		if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
			omap3_clkdm_sleep(clkdm);
	}

	return 0;
}

struct clkdm_ops omap2_clkdm_operations = {
	.clkdm_add_wkdep	= omap2_clkdm_add_wkdep,
	.clkdm_del_wkdep	= omap2_clkdm_del_wkdep,
@@ -267,6 +313,6 @@ struct clkdm_ops omap3_clkdm_operations = {
	.clkdm_wakeup		= omap3_clkdm_wakeup,
	.clkdm_allow_idle	= omap3_clkdm_allow_idle,
	.clkdm_deny_idle	= omap3_clkdm_deny_idle,
	.clkdm_clk_enable	= omap2_clkdm_clk_enable,
	.clkdm_clk_disable	= omap2_clkdm_clk_disable,
	.clkdm_clk_enable	= omap3xxx_clkdm_clk_enable,
	.clkdm_clk_disable	= omap3xxx_clkdm_clk_disable,
};
+1 −0
Original line number Diff line number Diff line
@@ -67,6 +67,7 @@
#define OMAP3430_EN_IVA2_DPLL_MASK			(0x7 << 0)

/* CM_IDLEST_IVA2 */
#define OMAP3430_ST_IVA2_SHIFT				0
#define OMAP3430_ST_IVA2_MASK				(1 << 0)

/* CM_IDLEST_PLL_IVA2 */
+1 −0
Original line number Diff line number Diff line
@@ -1889,6 +1889,7 @@ static int _enable(struct omap_hwmod *oh)
			_enable_sysc(oh);
		}
	} else {
		_omap4_disable_module(oh);
		_disable_clocks(oh);
		pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
			 oh->name, r);
+12 −3
Original line number Diff line number Diff line
@@ -100,9 +100,9 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = {

/* IVA2 (IVA2) */
static struct omap_hwmod_rst_info omap3xxx_iva_resets[] = {
	{ .name = "logic", .rst_shift = 0 },
	{ .name = "seq0", .rst_shift = 1 },
	{ .name = "seq1", .rst_shift = 2 },
	{ .name = "logic", .rst_shift = 0, .st_shift = 8 },
	{ .name = "seq0", .rst_shift = 1, .st_shift = 9 },
	{ .name = "seq1", .rst_shift = 2, .st_shift = 10 },
};

static struct omap_hwmod omap3xxx_iva_hwmod = {
@@ -112,6 +112,15 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
	.rst_lines	= omap3xxx_iva_resets,
	.rst_lines_cnt	= ARRAY_SIZE(omap3xxx_iva_resets),
	.main_clk	= "iva2_ck",
	.prcm = {
		.omap2 = {
			.module_offs = OMAP3430_IVA2_MOD,
			.prcm_reg_id = 1,
			.module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
			.idlest_reg_id = 1,
			.idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
		}
	},
};

/* timer class */
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