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Commit 6a848ccb authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: rip out ring->irq_mask 



We only ever enable/disable one interrupt (namely user_interrupts and
pipe_notify), so we don't need to track the interrupt masking state.

Also rename irq_enable to irq_enable_mask, now that it won't collide -
beforehand both a irq_mask and irq_enable_mask would have looked a bit
strange.

Reviewed-by: default avatarEric Anholt <eric@anholt.net>
Signed-Off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 1500f7ea

drivers/gpu/drm/i915/intel_ringbuffer.c

+8 −13
Original line number Diff line number Diff line
@@ -798,7 +798,6 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring) 
{

	struct drm_device *dev = ring->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;

	u32 mask = ring->irq_enable;



	if (!dev->irq_enabled)

	       return false;
@@ -810,9 +809,8 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring) 


	spin_lock(&ring->irq_lock);

	if (ring->irq_refcount++ == 0) {

		ring->irq_mask &= ~mask;

		I915_WRITE_IMR(ring, ring->irq_mask);

		ironlake_enable_irq(dev_priv, mask);

		I915_WRITE_IMR(ring, ~ring->irq_enable_mask);

		ironlake_enable_irq(dev_priv, ring->irq_enable_mask);

	}

	spin_unlock(&ring->irq_lock);
@@ -824,13 +822,11 @@ gen6_ring_put_irq(struct intel_ring_buffer *ring) 
{

	struct drm_device *dev = ring->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;

	u32 mask = ring->irq_enable;



	spin_lock(&ring->irq_lock);

	if (--ring->irq_refcount == 0) {

		ring->irq_mask |= mask;

		I915_WRITE_IMR(ring, ring->irq_mask);

		ironlake_disable_irq(dev_priv, mask);

		I915_WRITE_IMR(ring, ~0);

		ironlake_disable_irq(dev_priv, ring->irq_enable_mask);

	}

	spin_unlock(&ring->irq_lock);
@@ -1002,7 +998,6 @@ int intel_init_ring_buffer(struct drm_device *dev, 


	init_waitqueue_head(&ring->irq_queue);

	spin_lock_init(&ring->irq_lock);

	ring->irq_mask = ~0;



	if (I915_NEED_GFX_HWS(dev)) {

		ret = init_status_page(ring);
@@ -1380,7 +1375,7 @@ static const struct intel_ring_buffer gen6_bsd_ring = { 
	.flush			= gen6_ring_flush,

	.add_request		= gen6_add_request,

	.get_seqno		= gen6_ring_get_seqno,

	.irq_enable		= GEN6_BSD_USER_INTERRUPT,

	.irq_enable_mask	= GEN6_BSD_USER_INTERRUPT,

	.irq_get		= gen6_ring_get_irq,

	.irq_put		= gen6_ring_put_irq,

	.dispatch_execbuffer	= gen6_ring_dispatch_execbuffer,
@@ -1426,7 +1421,7 @@ static const struct intel_ring_buffer gen6_blt_ring = { 
	.get_seqno		= gen6_ring_get_seqno,

	.irq_get		= gen6_ring_get_irq,

	.irq_put		= gen6_ring_put_irq,

	.irq_enable		= GEN6_BLITTER_USER_INTERRUPT,

	.irq_enable_mask	= GEN6_BLITTER_USER_INTERRUPT,

	.dispatch_execbuffer	= gen6_ring_dispatch_execbuffer,

	.sync_to		= gen6_blt_ring_sync_to,

	.semaphore_register	= {MI_SEMAPHORE_SYNC_BR,
@@ -1446,7 +1441,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev) 
		ring->flush = gen6_render_ring_flush;

		ring->irq_get = gen6_ring_get_irq;

		ring->irq_put = gen6_ring_put_irq;

		ring->irq_enable = GT_USER_INTERRUPT;

		ring->irq_enable_mask = GT_USER_INTERRUPT;

		ring->get_seqno = gen6_ring_get_seqno;

	} else if (IS_GEN5(dev)) {

		ring->add_request = pc_render_add_request;
@@ -1471,7 +1466,7 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size) 
		ring->add_request = gen6_add_request;

		ring->irq_get = gen6_ring_get_irq;

		ring->irq_put = gen6_ring_put_irq;

		ring->irq_enable = GT_USER_INTERRUPT;

		ring->irq_enable_mask = GT_USER_INTERRUPT;

	} else if (IS_GEN5(dev)) {

		ring->add_request = pc_render_add_request;

		ring->get_seqno = pc_render_get_seqno;

drivers/gpu/drm/i915/intel_ringbuffer.h

+1 −2
Original line number Diff line number Diff line
@@ -58,8 +58,7 @@ struct intel_ring_buffer { 


	spinlock_t	irq_lock;

	u32		irq_refcount;

	u32		irq_mask;

	u32		irq_enable;		/* IRQs enabled for this ring */

	u32		irq_enable_mask;	/* bitmask to enable ring interrupt */

	u32		irq_seqno;		/* last seq seem at irq time */

	u32		trace_irq_seqno;

	u32		waiting_seqno;