Merge tag 'v3.18.17' of... (6a47a12f) · Commits · e / devices / android_kernel_xiaomi_markw

Documentation/networking/rds.txt

+4 −5

Original line number	Diff line number	Diff line
		@@ -62,11 +62,10 @@ Socket Interface
		================

		AF_RDS, PF_RDS, SOL_RDS
		These constants haven't been assigned yet, because RDS isn't in
		mainline yet. Currently, the kernel module assigns some constant
		and publishes it to user space through two sysctl files
		/proc/sys/net/rds/pf_rds
		/proc/sys/net/rds/sol_rds
		AF_RDS and PF_RDS are the domain type to be used with socket(2)
		to create RDS sockets. SOL_RDS is the socket-level to be used
		with setsockopt(2) and getsockopt(2) for RDS specific socket
		options.

		fd = socket(PF_RDS, SOCK_SEQPACKET, 0);
		This creates a new, unbound RDS socket.

Documentation/pinctrl.txt

+8 −9

Original line number	Diff line number	Diff line
		@@ -72,7 +72,6 @@ static struct pinctrl_desc foo_desc = {
		.name = "foo",
		.pins = foo_pins,
		.npins = ARRAY_SIZE(foo_pins),
		.maxpin = 63,
		.owner = THIS_MODULE,
		};

		@@ -164,8 +163,8 @@ static const char foo_get_group_name(struct pinctrl_dev pctldev,
		}

		static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
		unsigned ** const pins,
		unsigned * const num_pins)
		const unsigned **pins,
		unsigned *num_pins)
		{
		pins = (unsigned ) foo_groups[selector].pins;
		*num_pins = foo_groups[selector].num_pins;
		@@ -570,9 +569,8 @@ is possible to perform the requested mux setting, poke the hardware so that
		this happens.

		Pinmux drivers are required to supply a few callback functions, some are
		optional. Usually the enable() and disable() functions are implemented,
		writing values into some certain registers to activate a certain mux setting
		for a certain pin.
		optional. Usually the set_mux() function is implemented, writing values into
		some certain registers to activate a certain mux setting for a certain pin.

		A simple driver for the above example will work by setting bits 0, 1, 2, 3 or 4
		into some register named MUX to select a certain function with a certain
		@@ -1266,7 +1264,7 @@ The semantics of the pinctrl APIs are:

		Usually the pin control core handled the get/put pair and call out to the
		device drivers bookkeeping operations, like checking available functions and
		the associated pins, whereas the enable/disable pass on to the pin controller
		the associated pins, whereas select_state pass on to the pin controller
		driver which takes care of activating and/or deactivating the mux setting by
		quickly poking some registers.

		@@ -1363,8 +1361,9 @@ function, but with different named in the mapping as described under
		"Advanced mapping" above. So that for an SPI device, we have two states named
		"pos-A" and "pos-B".

		This snippet first muxes the function in the pins defined by group A, enables
		it, disables and releases it, and muxes it in on the pins defined by group B:
		This snippet first initializes a state object for both groups (in foo_probe()),
		then muxes the function in the pins defined by group A, and finally muxes it in
		on the pins defined by group B:

		#include <linux/pinctrl/consumer.h>

Documentation/stable_kernel_rules.txt

+10 −0

Original line number	Diff line number	Diff line
		@@ -81,6 +81,16 @@ format in the sign-off area:
		git cherry-pick fd21073
		git cherry-pick <this commit>

		Also, some patches may have kernel version prerequisites. This can be
		specified in the following format in the sign-off area:

		Cc: <stable@vger.kernel.org> # 3.3.x-

		The tag has the meaning of:
		git cherry-pick <this commit>

		For each "-stable" tree starting with the specified version.

		Following the submission:

		- The sender will receive an ACK when the patch has been accepted into the

Makefile

+1 −1

Original line number	Diff line number	Diff line
		VERSION = 3
		PATCHLEVEL = 18
		SUBLEVEL = 16
		SUBLEVEL = 17
		EXTRAVERSION =
		NAME = Diseased Newt

arch/arm/boot/dts/r8a7791.dtsi

+10 −7

Original line number	Diff line number	Diff line
		@@ -695,19 +695,19 @@
		};

		/* Variable factor clocks */
		sd1_clk: sd2_clk@e6150078 {
		sd2_clk: sd2_clk@e6150078 {
		compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
		reg = <0 0xe6150078 0 4>;
		clocks = <&pll1_div2_clk>;
		#clock-cells = <0>;
		clock-output-names = "sd1";
		clock-output-names = "sd2";
		};
		sd2_clk: sd3_clk@e615026c {
		sd3_clk: sd3_clk@e615026c {
		compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
		reg = <0 0xe615026c 0 4>;
		clocks = <&pll1_div2_clk>;
		#clock-cells = <0>;
		clock-output-names = "sd2";
		clock-output-names = "sd3";
		};
		mmc0_clk: mmc0_clk@e6150240 {
		compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
		@@ -922,17 +922,20 @@
		mstp3_clks: mstp3_clks@e615013c {
		compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
		reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
		clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
		<&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>;
		clocks = <&cp_clk>, <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
		<&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
		<&hp_clk>, <&hp_clk>;
		#clock-cells = <1>;
		renesas,clock-indices = <
		R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
		R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_PCIEC R8A7791_CLK_IIC1
		R8A7791_CLK_SSUSB R8A7791_CLK_CMT1
		R8A7791_CLK_USBDMAC0 R8A7791_CLK_USBDMAC1
		>;
		clock-output-names =
		"tpu0", "sdhi2", "sdhi1", "sdhi0",
		"mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1";
		"mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1",
		"usbdmac0", "usbdmac1";
		};
		mstp5_clks: mstp5_clks@e6150144 {
		compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";