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Commit 69e130a6 authored by Jerome Glisse's avatar Jerome Glisse Committed by Dave Airlie
Browse files

drm/radeon: make ib size variable



This avoid to waste ib pool size and avoid a bunch of wait for
previous ib to finish.

Signed-off-by: default avatarJerome Glisse <jglisse@redhat.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 1f2e124d
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+1 −1
Original line number Diff line number Diff line
@@ -3708,7 +3708,7 @@ int r100_ib_test(struct radeon_device *rdev)
		return r;
	}
	WREG32(scratch, 0xCAFEDEAD);
	r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &ib);
	r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &ib, 256);
	if (r) {
		return r;
	}
+1 −1
Original line number Diff line number Diff line
@@ -2711,7 +2711,7 @@ int r600_ib_test(struct radeon_device *rdev, int ring)
		return r;
	}
	WREG32(scratch, 0xCAFEDEAD);
	r = radeon_ib_get(rdev, ring, &ib);
	r = radeon_ib_get(rdev, ring, &ib, 256);
	if (r) {
		DRM_ERROR("radeon: failed to get ib (%d).\n", r);
		return r;
+9 −7
Original line number Diff line number Diff line
@@ -619,16 +619,17 @@ void r600_blit_fini(struct radeon_device *rdev)
	radeon_bo_unref(&rdev->r600_blit.shader_obj);
}

static int r600_vb_ib_get(struct radeon_device *rdev)
static int r600_vb_ib_get(struct radeon_device *rdev, unsigned size)
{
	int r;
	r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->r600_blit.vb_ib);
	r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX,
			  &rdev->r600_blit.vb_ib, size);
	if (r) {
		DRM_ERROR("failed to get IB for vertex buffer\n");
		return r;
	}

	rdev->r600_blit.vb_total = 64*1024;
	rdev->r600_blit.vb_total = size;
	rdev->r600_blit.vb_used = 0;
	return 0;
}
@@ -693,10 +694,6 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, unsigned num_gpu_pages)
	int num_loops = 0;
	int dwords_per_loop = rdev->r600_blit.ring_size_per_loop;

	r = r600_vb_ib_get(rdev);
	if (r)
		return r;

	/* num loops */
	while (num_gpu_pages) {
		num_gpu_pages -=
@@ -705,6 +702,11 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, unsigned num_gpu_pages)
		num_loops++;
	}

	/* 48 bytes for vertex per loop */
	r = r600_vb_ib_get(rdev, (num_loops*48)+256);
	if (r)
		return r;

	/* calculate number of loops correctly */
	ring_size = num_loops * dwords_per_loop;
	ring_size += rdev->r600_blit.ring_size_common;
+2 −1
Original line number Diff line number Diff line
@@ -638,7 +638,8 @@ struct r600_blit {

void r600_blit_suspend(struct radeon_device *rdev);

int radeon_ib_get(struct radeon_device *rdev, int ring, struct radeon_ib **ib);
int radeon_ib_get(struct radeon_device *rdev, int ring,
		  struct radeon_ib **ib, unsigned size);
void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib);
int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib);
int radeon_ib_pool_init(struct radeon_device *rdev);
+3 −2
Original line number Diff line number Diff line
@@ -246,7 +246,9 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
		radeon_mutex_unlock(&rdev->cs_mutex);
		return r;
	}
	r =  radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &parser.ib);
	ib_chunk = &parser.chunks[parser.chunk_ib_idx];
	r =  radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &parser.ib,
			   ib_chunk->length_dw * 4);
	if (r) {
		DRM_ERROR("Failed to get ib !\n");
		radeon_cs_parser_fini(&parser, r);
@@ -264,7 +266,6 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
	/* Copy the packet into the IB, the parser will read from the
	 * input memory (cached) and write to the IB (which can be
	 * uncached). */
	ib_chunk = &parser.chunks[parser.chunk_ib_idx];
	parser.ib->length_dw = ib_chunk->length_dw;
	r = radeon_cs_parse(&parser);
	if (r || parser.parser_error) {
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