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Commit 69b1803a authored by Kelvin Cheung's avatar Kelvin Cheung Committed by John Crispin
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MIPS: Loongson1B: Fix a typo 



Fix a typo in the code.

Signed-off-by: default avatarKelvin Cheung <keguang.zhang@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4434


Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
parent 94fd4bdf

arch/mips/loongson1/common/clock.c

+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ void __init plat_time_init(void) 
	/* setup mips r4k timer */

	clk = clk_get(NULL, "cpu");

	if (IS_ERR(clk))

		panic("unable to get dc clock, err=%ld", PTR_ERR(clk));

		panic("unable to get cpu clock, err=%ld", PTR_ERR(clk));



	mips_hpt_frequency = clk_get_rate(clk) / 2;

}