Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6919132e authored by Adam Jackson's avatar Adam Jackson Committed by Daniel Vetter
Browse files

drm/i915/dp: Tweak auxch clock divider for PCH 



Matches the advice in the Sandybridge documentation.

Signed-off-by: default avatarAdam Jackson <ajax@redhat.com>
Acked-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 1f182b27

drivers/gpu/drm/i915/intel_dp.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -378,7 +378,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, 
		else

		else

			aux_clock_divider = 225; /* eDP input clock at 450Mhz */

			aux_clock_divider = 225; /* eDP input clock at 450Mhz */

	} else if (HAS_PCH_SPLIT(dev))

	} else if (HAS_PCH_SPLIT(dev))

		aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */

		aux_clock_divider = 63; /* IRL input clock fixed at 125Mhz */

	else

	else

		aux_clock_divider = intel_hrawclk(dev) / 2;

		aux_clock_divider = intel_hrawclk(dev) / 2;