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Commit 68d18ad7 authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
Browse files

drm/i915: set the LPT FDI RX polarity reversal bit when needed 



If we fail to set the bit when needed we get some nice FDI link
training failures (AKA "black screen on VGA output").

While we don't really know how to properly choose whether we need to
set the bit or not (VBT?), just read the initial value set by the BIOS
and store it for later usage.

Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent dde86e2d

drivers/gpu/drm/i915/i915_drv.h

+2 −0
Original line number Diff line number Diff line
@@ -915,6 +915,8 @@ typedef struct drm_i915_private { 
	bool hw_contexts_disabled;

	uint32_t hw_context_size;



	bool fdi_rx_polarity_reversed;



	struct i915_suspend_saved_registers regfile;



	/* Old dri1 support infrastructure, beware the dragons ya fools entering

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -3917,6 +3917,7 @@ 
#define  FDI_FS_ERRC_ENABLE		(1<<27)

#define  FDI_FE_ERRC_ENABLE		(1<<26)

#define  FDI_DP_PORT_WIDTH_X8           (7<<19)

#define  FDI_RX_POLARITY_REVERSED_LPT	(1<<16)

#define  FDI_8BPC                       (0<<16)

#define  FDI_10BPC                      (1<<16)

#define  FDI_6BPC                       (2<<16)

drivers/gpu/drm/i915/intel_crt.c

+8 −0
Original line number Diff line number Diff line
@@ -798,4 +798,12 @@ void intel_crt_init(struct drm_device *dev) 
	crt->force_hotplug_required = 0;



	dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;



	/*

	 * TODO: find a proper way to discover whether we need to set the

	 * polarity reversal bit or not, instead of relying on the BIOS.

	 */

	if (HAS_PCH_LPT(dev))

		dev_priv->fdi_rx_polarity_reversed =

		     !!(I915_READ(_FDI_RXA_CTL) & FDI_RX_POLARITY_REVERSED_LPT);

}

drivers/gpu/drm/i915/intel_ddi.c

+2 −0
Original line number Diff line number Diff line
@@ -180,6 +180,8 @@ void hsw_fdi_link_train(struct drm_crtc *crtc) 
	/* Enable the PCH Receiver FDI PLL */

	rx_ctl_val = FDI_RX_PLL_ENABLE | FDI_RX_ENHANCE_FRAME_ENABLE |

		     ((intel_crtc->fdi_lanes - 1) << 19);

	if (dev_priv->fdi_rx_polarity_reversed)

		rx_ctl_val |= FDI_RX_POLARITY_REVERSED_LPT;

	I915_WRITE(_FDI_RXA_CTL, rx_ctl_val);

	POSTING_READ(_FDI_RXA_CTL);

	udelay(220);