Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 68c6b859 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (48 commits)
  x86/PCI: Prevent mmconfig memory corruption
  ACPI: Use GPE reference counting to support shared GPEs
  x86/PCI: use host bridge _CRS info by default on 2008 and newer machines
  PCI: augment bus resource table with a list
  PCI: add pci_bus_for_each_resource(), remove direct bus->resource[] refs
  PCI: read bridge windows before filling in subtractive decode resources
  PCI: split up pci_read_bridge_bases()
  PCIe PME: use pci_pcie_cap()
  PCI PM: Run-time callbacks for PCI bus type
  PCIe PME: use pci_is_pcie()
  PCI / ACPI / PM: Platform support for PCI PME wake-up
  ACPI / ACPICA: Multiple system notify handlers per device
  ACPI / PM: Add more run-time wake-up fields
  ACPI: Use GPE reference counting to support shared GPEs
  PCI PM: Make it possible to force using INTx for PCIe PME signaling
  PCI PM: PCIe PME root port service driver
  PCI PM: Add function for checking PME status of devices
  PCI: mark is_pcie obsolete
  PCI: set PCI_PREF_RANGE_TYPE_64 in pci_bridge_check_ranges
  PCI: pciehp: second try to get big range for pcie devices
  ...
parents a4a47bc0 bb8d4133
Loading
Loading
Loading
Loading
+14 −2
Original line number Diff line number Diff line
@@ -1948,8 +1948,12 @@ and is between 256 and 4096 characters. It is defined in the file
				IRQ routing is enabled.
		noacpi		[X86] Do not use ACPI for IRQ routing
				or for PCI scanning.
		use_crs		[X86] Use _CRS for PCI resource
				allocation.
		use_crs		[X86] Use PCI host bridge window information
				from ACPI.  On BIOSes from 2008 or later, this
				is enabled by default.  If you need to use this,
				please report a bug.
		nocrs		[X86] Ignore PCI host bridge windows from ACPI.
			        If you need to use this, please report a bug.
		routeirq	Do IRQ routing for all PCI devices.
				This is normally done in pci_enable_device(),
				so this option is a temporary workaround
@@ -1998,6 +2002,14 @@ and is between 256 and 4096 characters. It is defined in the file
		force	Enable ASPM even on devices that claim not to support it.
			WARNING: Forcing ASPM on may cause system lockups.

	pcie_pme=	[PCIE,PM] Native PCIe PME signaling options:
		off	Do not use native PCIe PME signaling.
		force	Use native PCIe PME signaling even if the BIOS refuses
			to allow the kernel to control the relevant PCIe config
			registers.
		nomsi	Do not use MSI for native PCIe PME signaling (this makes
			all PCIe root ports use INTx for everything).

	pcmv=		[HW,PCMCIA] BadgePAD 4

	pd.		[PARIDE]
+3 −3
Original line number Diff line number Diff line
@@ -126,8 +126,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_final);
#define MB			(1024*KB)
#define GB			(1024*MB)

void
pcibios_align_resource(void *data, struct resource *res,
resource_size_t
pcibios_align_resource(void *data, const struct resource *res,
		       resource_size_t size, resource_size_t align)
{
	struct pci_dev *dev = data;
@@ -184,7 +184,7 @@ pcibios_align_resource(void *data, struct resource *res,
		}
	}

	res->start = start;
	return start;
}
#undef KB
#undef MB
+5 −3
Original line number Diff line number Diff line
@@ -616,7 +616,7 @@ char * __init pcibios_setup(char *str)
 * but we want to try to avoid allocating at 0x2900-0x2bff
 * which might be mirrored at 0x0100-0x03ff..
 */
void pcibios_align_resource(void *data, struct resource *res,
resource_size_t pcibios_align_resource(void *data, const struct resource *res,
				resource_size_t size, resource_size_t align)
{
	resource_size_t start = res->start;
@@ -624,7 +624,9 @@ void pcibios_align_resource(void *data, struct resource *res,
	if (res->flags & IORESOURCE_IO && start & 0x300)
		start = (start + 0x3ff) & ~0x3ff;

	res->start = (start + align - 1) & ~(align - 1);
	start = (start + align - 1) & ~(align - 1);

	return start;
}

/**
+7 −9
Original line number Diff line number Diff line
@@ -41,18 +41,16 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
	return 0;
}

void
pcibios_align_resource(void *data, struct resource *res,
resource_size_t
pcibios_align_resource(void *data, const struct resource *res,
		       resource_size_t size, resource_size_t align)
{
	if (res->flags & IORESOURCE_IO) {
	resource_size_t start = res->start;

		if (start & 0x300) {
	if ((res->flags & IORESOURCE_IO) && (start & 0x300))
		start = (start + 0x3ff) & ~0x3ff;
			res->start = start;
		}
	}

	return start
}

int pcibios_enable_resources(struct pci_dev *dev, int mask)
+7 −9
Original line number Diff line number Diff line
@@ -32,18 +32,16 @@
 * but we want to try to avoid allocating at 0x2900-0x2bff
 * which might have be mirrored at 0x0100-0x03ff..
 */
void
pcibios_align_resource(void *data, struct resource *res,
resource_size_t
pcibios_align_resource(void *data, const struct resource *res,
		       resource_size_t size, resource_size_t align)
{
	if (res->flags & IORESOURCE_IO) {
	resource_size_t start = res->start;

		if (start & 0x300) {
	if ((res->flags & IORESOURCE_IO) && (start & 0x300))
		start = (start + 0x3ff) & ~0x3ff;
			res->start = start;
		}
	}

	return start
}


Loading