Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 688911c2 authored by Giuseppe CAVALLARO's avatar Giuseppe CAVALLARO Committed by David S. Miller
Browse files

stmmac: fix Transmit FIFO flush operation 



Fix the Transmit FIFO flush operation; it was
disabled while reworking the descriptor structures.

Signed-off-by: default avatarGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 56b106ae

drivers/net/stmmac/common.h

+1 −0
Original line number Diff line number Diff line
@@ -244,3 +244,4 @@ extern void stmmac_set_mac_addr(unsigned long ioaddr, u8 addr[6], 
				unsigned int high, unsigned int low);

extern void stmmac_get_mac_addr(unsigned long ioaddr, unsigned char *addr,

				unsigned int high, unsigned int low);

extern void dwmac_dma_flush_tx_fifo(unsigned long ioaddr);

drivers/net/stmmac/dwmac1000.h

+0 −1
Original line number Diff line number Diff line
@@ -172,7 +172,6 @@ enum rfd { 
	deac_full_minus_4 = 0x00401800,

};

#define DMA_CONTROL_TSF		0x00200000 /* Transmit  Store and Forward */

#define DMA_CONTROL_FTF		0x00100000 /* Flush transmit FIFO */



enum ttc_control {

	DMA_CONTROL_TTC_64 = 0x00000000,

drivers/net/stmmac/dwmac1000_dma.c

+0 −9
Original line number Diff line number Diff line
@@ -58,15 +58,6 @@ static int dwmac1000_dma_init(unsigned long ioaddr, int pbl, u32 dma_tx, 
	return 0;

}



/* Transmit FIFO flush operation */

static void dwmac1000_flush_tx_fifo(unsigned long ioaddr)

{

	u32 csr6 = readl(ioaddr + DMA_CONTROL);

	writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL);



	do {} while ((readl(ioaddr + DMA_CONTROL) & DMA_CONTROL_FTF));

}



static void dwmac1000_dma_operation_mode(unsigned long ioaddr, int txmode,

				    int rxmode)

{

drivers/net/stmmac/dwmac_dma.h

+1 −0
Original line number Diff line number Diff line
@@ -95,6 +95,7 @@ 
#define DMA_STATUS_TU	0x00000004	/* Transmit Buffer Unavailable */

#define DMA_STATUS_TPS	0x00000002	/* Transmit Process Stopped */

#define DMA_STATUS_TI	0x00000001	/* Transmit Interrupt */

#define DMA_CONTROL_FTF		0x00100000 /* Flush transmit FIFO */



extern void dwmac_enable_dma_transmission(unsigned long ioaddr);

extern void dwmac_enable_dma_irq(unsigned long ioaddr);

drivers/net/stmmac/dwmac_lib.c

+7 −0
Original line number Diff line number Diff line
@@ -227,6 +227,13 @@ int dwmac_dma_interrupt(unsigned long ioaddr, 
	return ret;

}



void dwmac_dma_flush_tx_fifo(unsigned long ioaddr)

{

	u32 csr6 = readl(ioaddr + DMA_CONTROL);

	writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL);



	do {} while ((readl(ioaddr + DMA_CONTROL) & DMA_CONTROL_FTF));

}



void stmmac_set_mac_addr(unsigned long ioaddr, u8 addr[6],

			 unsigned int high, unsigned int low)