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Commit 68810b58 authored by Yan He's avatar Yan He Committed by Siddartha Mohanadoss
Browse files

mhi_dev: mhi: select PCIe interface for MHI on MDM9630



PCIe endpoint driver provides a service layer where PCIe client
drivers can choose PCIe interface to use. Update MHI driver to
choose PCIe interface when using PCIe driver APIs.

Change-Id: Ic64b0ff77505a49b26ff8bc686bbc7d0a73c4678
Signed-off-by: default avatarYan He <yanhe@codeaurora.org>
parent 77813844
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+3 −0
Original line number Diff line number Diff line
@@ -17,6 +17,8 @@ Required properties:
  - interrupts: The MHI interrupt used when Host issues request to
		process pending data to be read by the device.
  - interrupt-names: Should be mhi-device-inta for MHI interrupt.
  - qcom,mhi-ifc-id: ID of HW interface via which MHI on device side
		communicates with host side.

Example:

@@ -29,4 +31,5 @@ Example:
			    "ipa_uc_mbox_erdb";
		interrupts = <0 42 0>;
		interrupt-names = "mhi-device-inta";
		qcom,mhi-ifc-id = <0x030017cb>;
	};
+35 −11
Original line number Diff line number Diff line
@@ -53,6 +53,8 @@
#define MHI_HW_ACC_EVT_RING_START	2
#define MHI_HW_ACC_EVT_RING_END		1

#define MHI_HOST_REGION_NUM             2

#define MHI_MMIO_CTRL_INT_STATUS_A7_MSK	0x1
#define MHI_MMIO_CTRL_CRDB_STATUS_MSK	0x2

@@ -225,7 +227,7 @@ int mhi_pcie_config_db_routing(struct mhi_dev *mhi)
		"Event rings 0x%x => er_base 0x%x, er_end %d\n",
		mhi->cfg.event_rings, erdb_cfg.base, erdb_cfg.end);
	erdb_cfg.tgt_addr = (uint32_t) mhi->ipa_uc_mbox_erdb;
	ep_pcie_config_db_routing(chdb_cfg, erdb_cfg);
	ep_pcie_config_db_routing(mhi_ctx->phandle, chdb_cfg, erdb_cfg);

	return rc;
}
@@ -239,7 +241,7 @@ static int mhi_hwc_init(struct mhi_dev *mhi)
	struct ep_pcie_db_config erdb_cfg;

	/* Call IPA HW_ACC Init with MSI Address and db routing info */
	rc = ep_pcie_get_msi_config(&cfg);
	rc = ep_pcie_get_msi_config(mhi_ctx->phandle, &cfg);
	if (rc) {
		pr_err("Error retrieving pcie msi logic\n");
		return rc;
@@ -477,7 +479,7 @@ static int mhi_dev_send_event(struct mhi_dev *mhi, int evnt_ring,
	mhi_log(MHI_MSG_VERBOSE, "evnt type :0x%x\n", el->evt_tr_comp.type);
	mhi_log(MHI_MSG_VERBOSE, "evnt chid :0x%x\n", el->evt_tr_comp.chid);

	rc = ep_pcie_trigger_msi(MHI_EP_MSI_NUM);
	rc = ep_pcie_trigger_msi(mhi_ctx->phandle, MHI_EP_MSI_NUM);
	if (rc) {
		pr_err("%s: error sending msi\n", __func__);
		return rc;
@@ -985,6 +987,7 @@ int mhi_dev_config_outbound_iatu(struct mhi_dev *mhi)
{
	struct ep_pcie_iatu control, data;
	int rc = 0;
	struct ep_pcie_iatu entries[MHI_HOST_REGION_NUM];

	data.start = mhi->data_base.device_pa;
	data.end = mhi->data_base.device_pa + mhi->data_base.size - 1;
@@ -996,7 +999,11 @@ int mhi_dev_config_outbound_iatu(struct mhi_dev *mhi)
	control.tgt_lower = HOST_ADDR_LSB(mhi->ctrl_base.host_pa);
	control.tgt_upper = HOST_ADDR_MSB(mhi->ctrl_base.host_pa);

	rc = ep_pcie_config_outbound_iatu(data, control);
	entries[0] = data;
	entries[1] = control;

	rc = ep_pcie_config_outbound_iatu(mhi_ctx->phandle, entries,
					MHI_HOST_REGION_NUM);
	if (rc) {
		pr_err("error configure iATU\n");
		return rc;
@@ -1129,7 +1136,7 @@ static int mhi_dev_cache_host_cfg(struct mhi_dev *mhi)
	if (rc)
		return rc;

	rc = ep_pcie_get_msi_config(&cfg);
	rc = ep_pcie_get_msi_config(mhi_ctx->phandle, &cfg);
	if (rc)
		pr_err("Error configure pcie msi logic\n");
	else
@@ -1706,6 +1713,21 @@ static int get_device_tree_data(struct platform_device *pdev)

	mhi_ctx = mhi;

	rc = of_property_read_u32((&pdev->dev)->of_node,
				"qcom,mhi-ifc-id",
				&mhi_ctx->ifc_id);

	if (rc) {
		pr_err("qcom,mhi-ifc-id does not exist.\n");
		return rc;
	}

	mhi_ctx->phandle = ep_pcie_get_phandle(mhi_ctx->ifc_id);
	if (!mhi_ctx->phandle) {
		pr_err("PCIe driver is not ready yet.\n");
		return -EPROBE_DEFER;
	}

	rc = mhi_dev_mmio_init(mhi_ctx);
	if (rc) {
		pr_err("Failed to update the MMIO init\n");
@@ -1738,19 +1760,19 @@ static int get_device_tree_data(struct platform_device *pdev)
	mhi->event_reg.mode = EP_PCIE_TRIGGER_CALLBACK;
	mhi->event_reg.callback = mhi_dev_sm_pcie_handler;

	rc = ep_pcie_register_event(&mhi_ctx->event_reg);
	rc = ep_pcie_register_event(mhi_ctx->phandle, &mhi_ctx->event_reg);
	if (rc) {
		pr_err("PCIe register for MHI SM cb failed\n");
		return rc;
	}

	rc = ep_pcie_get_msi_config(&msi_cfg);
	rc = ep_pcie_get_msi_config(mhi_ctx->phandle, &msi_cfg);
	if (rc) {
		pr_err("MHI: error geting msi configs\n");
		return rc;
	}

	rc = ep_pcie_trigger_msi(MHI_EP_MSI_NUM);
	rc = ep_pcie_trigger_msi(mhi_ctx->phandle, MHI_EP_MSI_NUM);
	if (rc)
		return rc;

@@ -1822,9 +1844,6 @@ static int mhi_dev_probe(struct platform_device *pdev)
{
	int rc = 0;

	if (ep_pcie_get_linkstatus() != EP_PCIE_LINK_ENABLED)
		return -EPROBE_DEFER;

	if (pdev->dev.of_node) {
		rc = get_device_tree_data(pdev);
		if (rc) {
@@ -1833,6 +1852,11 @@ static int mhi_dev_probe(struct platform_device *pdev)
		}
	}

	if (ep_pcie_get_linkstatus(mhi_ctx->phandle) != EP_PCIE_LINK_ENABLED) {
		pr_err("PCIe link is not ready to use.\n");
		return -EPROBE_DEFER;
	}

	INIT_LIST_HEAD(&mhi_ctx->event_ring_list);
	INIT_LIST_HEAD(&mhi_ctx->process_ring_list);
	mutex_init(&mhi_ctx->mhi_lock);
+2 −0
Original line number Diff line number Diff line
@@ -497,6 +497,8 @@ struct mhi_dev {

	/* EP PCIe registration */
	struct ep_pcie_register_event	event_reg;
	u32                             ifc_id;
	struct ep_pcie_hw               *phandle;

	atomic_t			write_active;
	atomic_t			is_suspended;