Merge "ARM: dts: msm: Add ADC_TM channels for PM660" (685c94a4) · Commits · e / devices / android_kernel_xiaomi_markw

Documentation/devicetree/bindings/thermal/qpnp-adc-tm.txt

+72 −2

Original line number	Diff line number	Diff line
		@@ -12,14 +12,41 @@ VADC_TM node

		Required properties:
		- compatible : should be "qcom,qpnp-adc-tm" for thermal ADC driver.
		: should be "qcom,qpnp-adc-tm-hc" for thermal ADC driver using
		refreshed BTM peripheral.
		- reg : offset and length of the PMIC Aribter register map.
		- address-cells : Must be one.
		- size-cells : Must be zero.
		- interrupts : The thermal ADC bank peripheral interrupts for eoc, high and low interrupts.
		- interrupt-names : Should be "eoc-int-en-set", "high-thr-en-set" and "low-thr-en-set".
		- interrupt-names : Should be "eoc-int-en-set", "high-thr-en-set" and "low-thr-en-set"
		for qcom,qpnp-adc-tm type.
		: Should be "eoc-int-en-set" for qcom,qpnp-adc-tm-hc type.
		- qcom,adc-bit-resolution : Bit resolution of the ADC.
		- qcom,adc-vdd-reference : Voltage reference used by the ADC.

		The following properties are required in the main node for qcom,qpnp-adc-tm-hc peripheral.
		- qcom,decimation : Should be present for qcom,qpnp-adc-tm-hc peripheral as its common setting
		across all the channels. Sampling rate to use for all the channel measurements.
		Select from the following unsigned int.
		0 : 512
		1 : 1K
		2 : 2K
		3 : 4K
		- qcom,fast-avg-setup : Should be present for qcom,qpnp-adc-tm-hc peripheral as its common setting
		across all the channels. Average number of samples to be used for measurement.
		Fast averaging provides the option to obtain a single measurement from the ADC
		that is an average of multiple samples. The value selected is 2^(value)
		Select from the following unsigned int.
		0 : 1
		1 : 2
		2 : 4
		3 : 8
		4 : 16
		5 : 32
		6 : 64
		7 : 128
		8 : 256

		Optional properties:
		- qcom,thermal-node : If present a thermal node is created and the channel is registered as
		part of the thermal sysfs which allows clients to use the thermal framework
		@@ -54,6 +81,8 @@ Required properties:
		1 : 1K
		2 : 2K
		3 : 4K
		Note: This property is not required in the channel node in qcom,qpnp-adc-tm-hc
		peripheral.
		- qcom,pre-div-channel-scaling : Pre-div used for the channel before the signal is being measured.
		Select from the following unsigned int for the corresponding
		numerator/denominator pre-div ratio.
		@@ -115,6 +144,8 @@ Required properties:
		6 : 64
		7 : 128
		8 : 256
		Note: This property is not required in the channel node in
		qcom,qpnp-adc-tm-hc peripheral.
		- qcom,btm-channel-number : Depending on the PMIC version, a max of upto 8 BTM channels.
		The BTM channel numbers are statically allocated to the
		corresponding channel node.
		@@ -126,7 +157,7 @@ client_node {
		qcom,client-adc_tm = <&pm8941_adc_tm>;
		};

		Example:
		Example for "qcom,qpnp-adc-tm" device:
		/* Main Node */
		qcom,vadc@3400 {
		compatible = "qcom,qpnp-adc-tm";
		@@ -170,3 +201,42 @@ Example:
		qcom,btm-channel-number = <0x78>;
		};
		};

		Example for "qcom,qpnp-adc-tm-hc" device:
		/* Main Node */
		pm8998_adc_tm: vadc@3400 {
		compatible = "qcom,qpnp-adc-tm-hc";
		reg = <0x3400 0x100>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
		interrupt-names = "eoc-int-en-set";
		qcom,adc-bit-resolution = <15>;
		qcom,adc-vdd-reference = <1875>;
		qcom,adc_tm-vadc = <&pm8998_vadc>;
		qcom,decimation = <0>;
		qcom,fast-avg-setup = <0>;

		/* Channel Node to be registered as part of thermal sysfs */
		chan@b5 {
		label = "pa_therm1";
		reg = <0xb5>;
		qcom,pre-div-channel-scaling = <0>;
		qcom,calibration-type = "absolute";
		qcom,scale-function = <2>;
		qcom,hw-settle-time = <0>;
		qcom,btm-channel-number = <0x70>;
		qcom,thermal-node;
		};

		/* Channel Node */
		chan@6 {
		label = "vbat_sns";
		reg = <6>;
		qcom,pre-div-channel-scaling = <1>;
		qcom,calibration-type = "absolute";
		qcom,scale-function = <3>;
		qcom,hw-settle-time = <0>;
		qcom,btm-channel-number = <0x78>;
		};
		};

arch/arm/boot/dts/qcom/msm-pm660.dtsi

+57 −0

Original line number	Diff line number	Diff line
		@@ -499,6 +499,63 @@
		};
		};

		pm660_adc_tm: vadc@3400 {
		compatible = "qcom,qpnp-adc-tm-hc";
		reg = <0x3400 0x100>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
		interrupt-names = "eoc-int-en-set";
		qcom,adc-bit-resolution = <15>;
		qcom,adc-vdd-reference = <1875>;
		qcom,adc_tm-vadc = <&pm660_vadc>;
		qcom,decimation = <0>;
		qcom,fast-avg-setup = <0>;

		chan@83 {
		label = "vph_pwr";
		reg = <0x83>;
		qcom,pre-div-channel-scaling = <1>;
		qcom,calibration-type = "absolute";
		qcom,scale-function = <0>;
		qcom,hw-settle-time = <0>;
		qcom,btm-channel-number = <0x60>;
		};

		chan@4d {
		label = "msm_therm";
		reg = <0x4d>;
		qcom,pre-div-channel-scaling = <0>;
		qcom,calibration-type = "ratiometric";
		qcom,scale-function = <2>;
		qcom,hw-settle-time = <2>;
		qcom,btm-channel-number = <0x68>;
		qcom,thermal-node;
		};

		chan@51 {
		label = "quiet_therm";
		reg = <0x51>;
		qcom,pre-div-channel-scaling = <0>;
		qcom,calibration-type = "ratiometric";
		qcom,scale-function = <2>;
		qcom,hw-settle-time = <2>;
		qcom,btm-channel-number = <0x70>;
		qcom,thermal-node;
		};

		chan@4c {
		label = "xo_therm";
		reg = <0x4c>;
		qcom,pre-div-channel-scaling = <0>;
		qcom,calibration-type = "ratiometric";
		qcom,scale-function = <4>;
		qcom,hw-settle-time = <2>;
		qcom,btm-channel-number = <0x78>;
		qcom,thermal-node;
		};
		};

		pm660_pbs: qcom,pbs@7300 {
		compatible = "qcom,qpnp-pbs";
		reg = <0x7300 0x100>;

drivers/hwmon/qpnp-adc-common.c

+218 −133

Original line number	Diff line number	Diff line
		@@ -902,14 +902,24 @@ int32_t qpnp_adc_scale_millidegc_pmic_voltage_thr(struct qpnp_vadc_chip *chip,
		int64_t low_output = 0, high_output = 0;
		int rc = 0, sign = 0;

		rc = qpnp_get_vadc_gain_and_offset(chip, &btm_param, CALIB_ABSOLUTE);
		/* Convert to Kelvin and account for voltage to be written as 2mV/K */
		low_output = (param->low_temp + KELVINMIL_DEGMIL) * 2;
		/* Convert to Kelvin and account for voltage to be written as 2mV/K */
		high_output = (param->high_temp + KELVINMIL_DEGMIL) * 2;

		if (param->adc_tm_hc) {
		low_output *= QPNP_VADC_HC_VREF_CODE;
		do_div(low_output, (QPNP_VADC_HC_VDD_REFERENCE_MV * 1000));
		high_output *= QPNP_VADC_HC_VREF_CODE;
		do_div(high_output, (QPNP_VADC_HC_VDD_REFERENCE_MV * 1000));
		} else {
		rc = qpnp_get_vadc_gain_and_offset(chip, &btm_param,
		CALIB_ABSOLUTE);
		if (rc < 0) {
		pr_err("Could not acquire gain and offset\n");
		return rc;
		}

		/* Convert to Kelvin and account for voltage to be written as 2mV/K */
		low_output = (param->low_temp + KELVINMIL_DEGMIL) * 2;
		/* Convert to voltage threshold */
		low_output = (low_output - QPNP_ADC_625_UV) * btm_param.dy;
		if (low_output < 0) {
		@@ -922,8 +932,6 @@ int32_t qpnp_adc_scale_millidegc_pmic_voltage_thr(struct qpnp_vadc_chip *chip,
		low_output += btm_param.adc_gnd;

		sign = 0;
		/* Convert to Kelvin and account for voltage to be written as 2mV/K */
		high_output = (param->high_temp + KELVINMIL_DEGMIL) * 2;
		/* Convert to voltage threshold */
		high_output = (high_output - QPNP_ADC_625_UV) * btm_param.dy;
		if (high_output < 0) {
		@@ -934,9 +942,11 @@ int32_t qpnp_adc_scale_millidegc_pmic_voltage_thr(struct qpnp_vadc_chip *chip,
		if (sign)
		high_output = -high_output;
		high_output += btm_param.adc_gnd;
		}

		*low_threshold = (uint32_t) low_output;
		*high_threshold = (uint32_t) high_output;

		pr_debug("high_temp:%d, low_temp:%d\n", param->high_temp,
		param->low_temp);
		pr_debug("adc_code_high:%x, adc_code_low:%x\n", *high_threshold,
		@@ -1229,12 +1239,25 @@ int32_t qpnp_adc_scale_therm_pu2(struct qpnp_vadc_chip *chip,
		EXPORT_SYMBOL(qpnp_adc_scale_therm_pu2);

		int32_t qpnp_adc_tm_scale_voltage_therm_pu2(struct qpnp_vadc_chip *chip,
		const struct qpnp_adc_properties *adc_properties,
		uint32_t reg, int64_t *result)
		{
		int64_t adc_voltage = 0;
		struct qpnp_vadc_linear_graph param1;
		int negative_offset;
		int negative_offset = 0;

		if (adc_properties->adc_hc) {
		/* (ADC code * vref_vadc (1.875V)) / 0x4000 */
		if (reg > QPNP_VADC_HC_MAX_CODE)
		reg = 0;
		adc_voltage = (int64_t) reg;
		adc_voltage *= QPNP_VADC_HC_VDD_REFERENCE_MV;
		adc_voltage = div64_s64(adc_voltage,
		QPNP_VADC_HC_VREF_CODE);
		qpnp_adc_map_voltage_temp(adcmap_100k_104ef_104fb_1875_vref,
		ARRAY_SIZE(adcmap_100k_104ef_104fb_1875_vref),
		adc_voltage, result);
		} else {
		qpnp_get_vadc_gain_and_offset(chip, &param1, CALIB_RATIOMETRIC);

		adc_voltage = (reg - param1.adc_gnd) * param1.adc_vref;
		@@ -1250,17 +1273,38 @@ int32_t qpnp_adc_tm_scale_voltage_therm_pu2(struct qpnp_vadc_chip *chip,
		adc_voltage, result);
		if (negative_offset)
		adc_voltage = -adc_voltage;
		}

		return 0;
		}
		EXPORT_SYMBOL(qpnp_adc_tm_scale_voltage_therm_pu2);

		int32_t qpnp_adc_tm_scale_therm_voltage_pu2(struct qpnp_vadc_chip *chip,
		const struct qpnp_adc_properties *adc_properties,
		struct qpnp_adc_tm_config *param)
		{
		struct qpnp_vadc_linear_graph param1;
		int rc;

		if (adc_properties->adc_hc) {
		rc = qpnp_adc_map_temp_voltage(
		adcmap_100k_104ef_104fb_1875_vref,
		ARRAY_SIZE(adcmap_100k_104ef_104fb_1875_vref),
		param->low_thr_temp, &param->low_thr_voltage);
		if (rc)
		return rc;
		param->low_thr_voltage *= QPNP_VADC_HC_VREF_CODE;
		do_div(param->low_thr_voltage, QPNP_VADC_HC_VDD_REFERENCE_MV);

		rc = qpnp_adc_map_temp_voltage(
		adcmap_100k_104ef_104fb_1875_vref,
		ARRAY_SIZE(adcmap_100k_104ef_104fb_1875_vref),
		param->high_thr_temp, &param->high_thr_voltage);
		if (rc)
		return rc;
		param->high_thr_voltage *= QPNP_VADC_HC_VREF_CODE;
		do_div(param->high_thr_voltage, QPNP_VADC_HC_VDD_REFERENCE_MV);
		} else {
		qpnp_get_vadc_gain_and_offset(chip, &param1, CALIB_RATIOMETRIC);

		rc = qpnp_adc_map_temp_voltage(adcmap_100k_104ef_104fb,
		@@ -1282,6 +1326,7 @@ int32_t qpnp_adc_tm_scale_therm_voltage_pu2(struct qpnp_vadc_chip *chip,
		param->high_thr_voltage *= param1.dy;
		do_div(param->high_thr_voltage, param1.adc_vref);
		param->high_thr_voltage += param1.adc_gnd;
		}

		return 0;
		}
		@@ -1391,7 +1436,7 @@ int32_t qpnp_adc_usb_scaler(struct qpnp_vadc_chip *chip,
		}
		EXPORT_SYMBOL(qpnp_adc_usb_scaler);

		int32_t qpnp_adc_vbatt_rscaler(struct qpnp_vadc_chip *chip,
		int32_t qpnp_adc_absolute_rthr(struct qpnp_vadc_chip *chip,
		struct qpnp_adc_tm_btm_param *param,
		uint32_t low_threshold, uint32_t high_threshold)
		{
		@@ -1399,32 +1444,49 @@ int32_t qpnp_adc_vbatt_rscaler(struct qpnp_vadc_chip *chip,
		int rc = 0, sign = 0;
		int64_t low_thr = 0, high_thr = 0;

		rc = qpnp_get_vadc_gain_and_offset(chip, &vbatt_param, CALIB_ABSOLUTE);
		if (param->adc_tm_hc) {
		low_thr = (param->low_thr/param->gain_den);
		low_thr *= param->gain_num;
		low_thr *= QPNP_VADC_HC_VREF_CODE;
		do_div(low_thr, (QPNP_VADC_HC_VDD_REFERENCE_MV * 1000));
		*low_threshold = low_thr;

		high_thr = (param->high_thr/param->gain_den);
		high_thr *= param->gain_num;
		high_thr *= QPNP_VADC_HC_VREF_CODE;
		do_div(high_thr, (QPNP_VADC_HC_VDD_REFERENCE_MV * 1000));
		*high_threshold = high_thr;
		} else {
		rc = qpnp_get_vadc_gain_and_offset(chip, &vbatt_param,
		CALIB_ABSOLUTE);
		if (rc < 0)
		return rc;

		low_thr = (((param->low_thr/param->gain_den) - QPNP_ADC_625_UV) *
		vbatt_param.dy);
		low_thr = (((param->low_thr/param->gain_den) -
		QPNP_ADC_625_UV) * vbatt_param.dy);
		if (low_thr < 0) {
		sign = 1;
		low_thr = -low_thr;
		}
		low_thr = low_thr * param->gain_num;
		do_div(low_thr, QPNP_ADC_625_UV);
		if (sign)
		low_thr = -low_thr;
		*low_threshold = low_thr + vbatt_param.adc_gnd;

		sign = 0;
		high_thr = (((param->high_thr/param->gain_den) - QPNP_ADC_625_UV) *
		vbatt_param.dy);
		high_thr = (((param->high_thr/param->gain_den) -
		QPNP_ADC_625_UV) * vbatt_param.dy);
		if (high_thr < 0) {
		sign = 1;
		high_thr = -high_thr;
		}
		high_thr = high_thr * param->gain_num;
		do_div(high_thr, QPNP_ADC_625_UV);
		if (sign)
		high_thr = -high_thr;
		*high_threshold = high_thr + vbatt_param.adc_gnd;
		}

		pr_debug("high_volt:%d, low_volt:%d\n", param->high_thr,
		param->low_thr);
		@@ -1432,48 +1494,16 @@ int32_t qpnp_adc_vbatt_rscaler(struct qpnp_vadc_chip *chip,
		*low_threshold);
		return 0;
		}
		EXPORT_SYMBOL(qpnp_adc_vbatt_rscaler);
		EXPORT_SYMBOL(qpnp_adc_absolute_rthr);

		int32_t qpnp_adc_absolute_rthr(struct qpnp_vadc_chip *chip,
		int32_t qpnp_adc_vbatt_rscaler(struct qpnp_vadc_chip *chip,
		struct qpnp_adc_tm_btm_param *param,
		uint32_t low_threshold, uint32_t high_threshold)
		{
		struct qpnp_vadc_linear_graph vbatt_param;
		int rc = 0, sign = 0;
		int64_t low_thr = 0, high_thr = 0;

		rc = qpnp_get_vadc_gain_and_offset(chip, &vbatt_param, CALIB_ABSOLUTE);
		if (rc < 0)
		return rc;

		low_thr = (((param->low_thr) - QPNP_ADC_625_UV) * vbatt_param.dy);
		if (low_thr < 0) {
		sign = 1;
		low_thr = -low_thr;
		}
		do_div(low_thr, QPNP_ADC_625_UV);
		if (sign)
		low_thr = -low_thr;
		*low_threshold = low_thr + vbatt_param.adc_gnd;

		sign = 0;
		high_thr = (((param->high_thr) - QPNP_ADC_625_UV) * vbatt_param.dy);
		if (high_thr < 0) {
		sign = 1;
		high_thr = -high_thr;
		return qpnp_adc_absolute_rthr(chip, param, low_threshold,
		high_threshold);
		}
		do_div(high_thr, QPNP_ADC_625_UV);
		if (sign)
		high_thr = -high_thr;
		*high_threshold = high_thr + vbatt_param.adc_gnd;

		pr_debug("high_volt:%d, low_volt:%d\n", param->high_thr,
		param->low_thr);
		pr_debug("adc_code_high:%x, adc_code_low:%x\n", *high_threshold,
		*low_threshold);
		return 0;
		}
		EXPORT_SYMBOL(qpnp_adc_absolute_rthr);
		EXPORT_SYMBOL(qpnp_adc_vbatt_rscaler);

		int32_t qpnp_vadc_absolute_rthr(struct qpnp_vadc_chip *chip,
		const struct qpnp_vadc_chan_properties *chan_prop,
		@@ -1533,6 +1563,11 @@ int32_t qpnp_adc_btm_scaler(struct qpnp_vadc_chip *chip,
		int64_t low_output = 0, high_output = 0;
		int rc = 0;

		if (param->adc_tm_hc) {
		pr_err("Update scaling for VADC_TM_HC\n");
		return -EINVAL;
		}

		qpnp_get_vadc_gain_and_offset(chip, &btm_param, CALIB_RATIOMETRIC);

		pr_debug("warm_temp:%d and cool_temp:%d\n", param->high_temp,
		@@ -1586,6 +1621,11 @@ int32_t qpnp_adc_qrd_skuh_btm_scaler(struct qpnp_vadc_chip *chip,
		int64_t low_output = 0, high_output = 0;
		int rc = 0;

		if (param->adc_tm_hc) {
		pr_err("Update scaling for VADC_TM_HC\n");
		return -EINVAL;
		}

		qpnp_get_vadc_gain_and_offset(chip, &btm_param, CALIB_RATIOMETRIC);

		pr_debug("warm_temp:%d and cool_temp:%d\n", param->high_temp,
		@@ -1639,6 +1679,11 @@ int32_t qpnp_adc_qrd_skut1_btm_scaler(struct qpnp_vadc_chip *chip,
		int64_t low_output = 0, high_output = 0;
		int rc = 0;

		if (param->adc_tm_hc) {
		pr_err("Update scaling for VADC_TM_HC\n");
		return -EINVAL;
		}

		qpnp_get_vadc_gain_and_offset(chip, &btm_param, CALIB_RATIOMETRIC);

		pr_debug("warm_temp:%d and cool_temp:%d\n", param->high_temp,
		@@ -1745,6 +1790,11 @@ int32_t qpnp_adc_smb_btm_rscaler(struct qpnp_vadc_chip *chip,
		int64_t low_output = 0, high_output = 0;
		int rc = 0;

		if (param->adc_tm_hc) {
		pr_err("Update scaling for VADC_TM_HC\n");
		return -EINVAL;
		}

		qpnp_get_vadc_gain_and_offset(chip, &btm_param, CALIB_RATIOMETRIC);

		pr_debug("warm_temp:%d and cool_temp:%d\n", param->high_temp,
		@@ -1981,8 +2031,8 @@ int32_t qpnp_adc_get_devicetree_data(struct spmi_device *spmi,
		struct qpnp_adc_amux *adc_channel_list;
		struct qpnp_adc_properties *adc_prop;
		struct qpnp_adc_amux_properties *amux_prop;
		int count_adc_channel_list = 0, decimation, rc = 0, i = 0;
		int cal_val_hc = 0;
		int count_adc_channel_list = 0, decimation = 0, rc = 0, i = 0;
		int decimation_tm_hc = 0, fast_avg_setup_tm_hc = 0, cal_val_hc = 0;
		bool adc_hc;

		if (!node)
		@@ -2022,9 +2072,30 @@ int32_t qpnp_adc_get_devicetree_data(struct spmi_device *spmi,
		adc_hc = adc_qpnp->adc_hc;
		adc_prop->adc_hc = adc_hc;

		if (of_device_is_compatible(node, "qcom,qpnp-adc-tm-hc")) {
		rc = of_property_read_u32(node, "qcom,decimation",
		&decimation_tm_hc);
		if (rc) {
		pr_err("Invalid decimation property\n");
		return -EINVAL;
		}

		rc = of_property_read_u32(node,
		"qcom,fast-avg-setup", &fast_avg_setup_tm_hc);
		if (rc) {
		pr_err("Invalid fast average setup with %d\n", rc);
		return -EINVAL;
		}

		if ((fast_avg_setup_tm_hc) > ADC_FAST_AVG_SAMPLE_16) {
		pr_err("Max average support is 2^16\n");
		return -EINVAL;
		}
		}

		for_each_child_of_node(node, child) {
		int channel_num, scaling, post_scaling, hw_settle_time;
		int fast_avg_setup, calib_type = 0, rc;
		int channel_num, scaling = 0, post_scaling = 0;
		int fast_avg_setup, calib_type = 0, rc, hw_settle_time = 0;
		const char calibration_param, channel_name;

		channel_name = of_get_property(child,
		@@ -2039,12 +2110,7 @@ int32_t qpnp_adc_get_devicetree_data(struct spmi_device *spmi,
		pr_err("Invalid channel num\n");
		return -EINVAL;
		}
		rc = of_property_read_u32(child, "qcom,decimation",
		&decimation);
		if (rc) {
		pr_err("Invalid channel decimation property\n");
		return -EINVAL;
		}

		if (!of_device_is_compatible(node, "qcom,qpnp-iadc")) {
		rc = of_property_read_u32(child,
		"qcom,hw-settle-time", &hw_settle_time);
		@@ -2094,12 +2160,31 @@ int32_t qpnp_adc_get_devicetree_data(struct spmi_device *spmi,
		return -EINVAL;
		}
		}

		/* ADC_TM_HC fast avg setting is common across channels */
		if (!of_device_is_compatible(node, "qcom,qpnp-adc-tm-hc")) {
		rc = of_property_read_u32(child,
		"qcom,fast-avg-setup", &fast_avg_setup);
		if (rc) {
		pr_err("Invalid channel fast average setup\n");
		return -EINVAL;
		}
		} else {
		fast_avg_setup = fast_avg_setup_tm_hc;
		}

		/* ADC_TM_HC decimation setting is common across channels */
		if (!of_device_is_compatible(node, "qcom,qpnp-adc-tm-hc")) {
		rc = of_property_read_u32(child,
		"qcom,decimation", &decimation);
		if (rc) {
		pr_err("Invalid decimation\n");
		return -EINVAL;
		}
		} else {
		decimation = decimation_tm_hc;
		}

		if (of_device_is_compatible(node, "qcom,qpnp-vadc-hc")) {
		rc = of_property_read_u32(child, "qcom,cal-val",
		&cal_val_hc);

drivers/thermal/qpnp-adc-tm.c

+1044 −407

File changed.

Preview size limit exceeded, changes collapsed.

include/linux/qpnp/qpnp-adc.h

+11 −1

Original line number	Diff line number	Diff line
		@@ -958,6 +958,7 @@ enum qpnp_state_request {
		* @low_temp: Low temperature threshold for which notification is requested.
		* @high_thr_voltage: High voltage for which notification is requested.
		* @low_thr_voltage: Low voltage for which notification is requested.
		* @adc_tm_hc: Represents the refreshed BTM register design.
		* @state_request: Enable/disable the corresponding high and low temperature
		* thresholds.
		* @timer_interval1: Select polling rate from qpnp_adc_meas_timer_1 type.
		@@ -980,6 +981,7 @@ struct qpnp_adc_tm_btm_param {
		int32_t low_thr;
		int32_t gain_num;
		int32_t gain_den;
		bool adc_tm_hc;
		enum qpnp_vadc_channels channel;
		enum qpnp_state_request state_request;
		enum qpnp_adc_meas_timer_1 timer_interval;
		@@ -1746,19 +1748,25 @@ int32_t qpnp_adc_qrd_skue_btm_scaler(struct qpnp_vadc_chip *dev,
		* and convert given temperature to voltage on supported
		* thermistor channels using 100k pull-up.
		* @dev: Structure device for qpnp vadc
		* @adc_prop: adc properties of the qpnp adc such as bit resolution,
		* reference voltage.
		* @param: The input temperature values.
		*/
		int32_t qpnp_adc_tm_scale_therm_voltage_pu2(struct qpnp_vadc_chip *dev,
		const struct qpnp_adc_properties *adc_properties,
		struct qpnp_adc_tm_config *param);
		/**
		* qpnp_adc_tm_scale_therm_voltage_pu2() - Performs reverse calibration
		* and converts the given ADC code to temperature for
		* thermistor channels using 100k pull-up.
		* @dev: Structure device for qpnp vadc
		* @adc_prop: adc properties of the qpnp adc such as bit resolution,
		* reference voltage.
		* @reg: The input ADC code.
		* @result: The physical measurement temperature on the thermistor.
		*/
		int32_t qpnp_adc_tm_scale_voltage_therm_pu2(struct qpnp_vadc_chip *dev,
		const struct qpnp_adc_properties *adc_prop,
		uint32_t reg, int64_t *result);
		/**
		* qpnp_adc_usb_scaler() - Performs reverse calibration on the low/high
		@@ -2096,10 +2104,12 @@ static inline int32_t qpnp_adc_scale_millidegc_pmic_voltage_thr(
		{ return -ENXIO; }
		static inline int32_t qpnp_adc_tm_scale_therm_voltage_pu2(
		struct qpnp_vadc_chip *dev,
		const struct qpnp_adc_properties *adc_properties,
		struct qpnp_adc_tm_config *param)
		{ return -ENXIO; }
		static inline int32_t qpnp_adc_tm_scale_voltage_therm_pu2(
		struct qpnp_vadc_chip *dev,
		const struct qpnp_adc_properties *adc_prop,
		uint32_t reg, int64_t *result)
		{ return -ENXIO; }
		static inline int32_t qpnp_adc_smb_btm_rscaler(struct qpnp_vadc_chip *dev,