Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 683b6c6f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull irq code updates from Thomas Gleixner:
 "The irq department proudly presents:

   - Another tree wide sweep of irq infrastructure abuse.  Clear winner
     of the trainwreck engineering contest was:
         #include "../../../kernel/irq/settings.h"

   - Tree wide update of irq_set_affinity() callbacks which miss a cpu
     online check when picking a single cpu out of the affinity mask.

   - Tree wide consolidation of interrupt statistics.

   - Updates to the threaded interrupt infrastructure to allow explicit
     wakeup of the interrupt thread and a variant of synchronize_irq()
     which synchronizes only the hard interrupt handler.  Both are
     needed to replace the homebrewn thread handling in the mmc/sdhci
     code.

   - New irq chip callbacks to allow proper support for GPIO based irqs.
     The GPIO based interrupts need to request/release GPIO resources
     from request/free_irq.

   - A few new ARM interrupt chips.  No revolutionary new hardware, just
     differently wreckaged variations of the scheme.

   - Small improvments, cleanups and updates all over the place"

I was hoping that that trainwreck engineering contest was a April Fools'
joke.  But no.

* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (68 commits)
  irqchip: sun7i/sun6i: Disable NMI before registering the handler
  ARM: sun7i/sun6i: dts: Fix IRQ number for sun6i NMI controller
  ARM: sun7i/sun6i: irqchip: Update the documentation
  ARM: sun7i/sun6i: dts: Add NMI irqchip support
  ARM: sun7i/sun6i: irqchip: Add irqchip driver for NMI controller
  genirq: Export symbol no_action()
  arm: omap: Fix typo in ams-delta-fiq.c
  m68k: atari: Fix the last kernel_stat.h fallout
  irqchip: sun4i: Simplify sun4i_irq_ack
  irqchip: sun4i: Use handle_fasteoi_irq for all interrupts
  genirq: procfs: Make smp_affinity values go+r
  softirq: Add linux/irq.h to make it compile again
  m68k: amiga: Add linux/irq.h to make it compile again
  irqchip: sun4i: Don't ack IRQs > 0, fix acking of IRQ 0
  irqchip: sun4i: Fix a comment about mask register initialization
  irqchip: sun4i: Fix irq 0 not working
  genirq: Add a new IRQCHIP_EOI_THREADED flag
  genirq: Document IRQCHIP_ONESHOT_SAFE flag
  ARM: sunxi: dt: Convert to the new irq controller compatibles
  irqchip: sunxi: Change compatibles
  ...
parents 1ead6581 1b422ecd

Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt

+7 −1
Original line number Diff line number Diff line 
Marvell Armada 370 and Armada XP Interrupt Controller

Marvell Armada 370, 375, 38x, XP Interrupt Controller

-----------------------------------------------------



Required properties:
@@ -16,7 +16,13 @@ Required properties: 
  automatically map to the interrupt controller registers of the

  current CPU)



Optional properties:



- interrupts: If defined, then it indicates that this MPIC is

  connected as a slave to another interrupt controller. This is

  typically the case on Armada 375 and Armada 38x, where the MPIC is

  connected as a slave to the Cortex-A9 GIC. The provided interrupt

  indicate to which GIC interrupt the MPIC output is connected.



Example:

Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt

+2 −2
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ Allwinner Sunxi Interrupt Controller 


Required properties:



- compatible : should be "allwinner,sun4i-ic"

- compatible : should be "allwinner,sun4i-a10-ic"

- reg : Specifies base physical address and size of the registers.

- interrupt-controller : Identifies the node as an interrupt controller

- #interrupt-cells : Specifies the number of cells needed to encode an
@@ -11,7 +11,7 @@ Required properties: 
Example:



intc: interrupt-controller {

	compatible = "allwinner,sun4i-ic";

	compatible = "allwinner,sun4i-a10-ic";

	reg = <0x01c20400 0x400>;

	interrupt-controller;

	#interrupt-cells = <1>;

Documentation/devicetree/bindings/interrupt-controller/allwinner,sun67i-sc-nmi.txt

0 → 100644
+27 −0
Original line number Diff line number Diff line 
Allwinner Sunxi NMI Controller

==============================



Required properties:



- compatible : should be "allwinner,sun7i-a20-sc-nmi" or

  "allwinner,sun6i-a31-sc-nmi"

- reg : Specifies base physical address and size of the registers.

- interrupt-controller : Identifies the node as an interrupt controller

- #interrupt-cells : Specifies the number of cells needed to encode an

  interrupt source. The value shall be 2. The first cell is the IRQ number, the

  second cell the trigger type as defined in interrupt.txt in this directory.

- interrupt-parent: Specifies the parent interrupt controller.

- interrupts: Specifies the interrupt line (NMI) which is handled by

  the interrupt controller in the parent controller's notation. This value

  shall be the NMI.



Example:



sc-nmi-intc@01c00030 {

	compatible = "allwinner,sun7i-a20-sc-nmi";

	interrupt-controller;

	#interrupt-cells = <2>;

	reg = <0x01c00030 0x0c>;

	interrupt-parent = <&gic>;

	interrupts = <0 0 4>;

};

arch/arm/boot/dts/sun4i-a10.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -331,7 +331,7 @@ 
		};



		intc: interrupt-controller@01c20400 {

			compatible = "allwinner,sun4i-ic";

			compatible = "allwinner,sun4i-a10-ic";

			reg = <0x01c20400 0x400>;

			interrupt-controller;

			#interrupt-cells = <1>;

arch/arm/boot/dts/sun5i-a10s.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -294,7 +294,7 @@ 
		};



		intc: interrupt-controller@01c20400 {

			compatible = "allwinner,sun4i-ic";

			compatible = "allwinner,sun4i-a10-ic";

			reg = <0x01c20400 0x400>;

			interrupt-controller;

			#interrupt-cells = <1>;