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Commit 672ab5d3 authored by Krishnankutty Kolathappilly's avatar Krishnankutty Kolathappilly
Browse files

msm: cpp: Add VBIF settings for CPP on msm8996 



Set the vbif register values on cpp hardware intialization.
The register offsets and values are read from camera device tree.

Change-Id: I8496c9476541cc192b9bfac990b56fe8d0dd3e12
Signed-off-by: default avatarKrishnankutty Kolathappilly <kkolatha@codeaurora.org>
parent f47b4920

Documentation/devicetree/bindings/media/video/msm-cpp.txt

+6 −0
Original line number Diff line number Diff line
@@ -56,6 +56,8 @@ Optional properties: 
- camss-vdd-supply: phandle to GDSC regulator controlling camss.

- qcom,bus-master: Flag for presence of CPP bus master. It has to be set only for

  platforms that support such feature.

- qcom,vbif-setting: The offset and value for vbif core qos registers.

  The first entry is register offset and second entry is register value.



Example:
@@ -93,6 +95,10 @@ Example: 
		qcom,clock-rates = <0 0 0 0 465000000 0 0 465000000 0 0 0 0>;

		qcom,min-clock-rate = <320000000>;

		qcom,bus-master = <1>;

		qcom,vbif-qos-setting = <0x20 0x10000000>,

			<0x24 0x10000000>,

			<0x28 0x10000000>,

			<0x2C 0x10000000>;

		qcom,cpp-fw-payload-info {

			qcom,stripe-base = <553>;

			qcom,plane-base = <481>;

drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c

+40 −1
Original line number Diff line number Diff line
@@ -193,6 +193,7 @@ struct msm_cpp_timer_t { 
};



struct msm_cpp_timer_t cpp_timer;

static void msm_cpp_set_vbif_reg_values(struct cpp_device *cpp_dev);



static int msm_cpp_init_bandwidth_mgr(struct cpp_device *cpp_dev)

{
@@ -1103,7 +1104,7 @@ static int cpp_init_hardware(struct cpp_device *cpp_dev) 


	rc = msm_cpp_update_gdscr_status(cpp_dev, true);

	if (rc < 0) {

		pr_err("update pcpp gdscr status failed\n");

		pr_err("update cpp gdscr status failed\n");

		goto req_irq_fail;

	}
@@ -1147,6 +1148,7 @@ static int cpp_init_hardware(struct cpp_device *cpp_dev) 
			MSM_CPP_MICRO_IRQGEN_CLR);

	}



	msm_cpp_set_vbif_reg_values(cpp_dev);

	return rc;



pwr_collapse_reset:
@@ -3610,6 +3612,43 @@ static int msm_cpp_update_gdscr_status(struct cpp_device *cpp_dev, 
end:

	return rc;

}

static void msm_cpp_set_vbif_reg_values(struct cpp_device *cpp_dev)

{

	int i, reg, val;

	const u32 *vbif_qos_arr = NULL;

	int vbif_qos_len = 0;

	struct platform_device *pdev;



	pr_debug("%s\n", __func__);

	if (cpp_dev != NULL) {

		pdev = cpp_dev->pdev;

		vbif_qos_arr = of_get_property(pdev->dev.of_node,

					       "qcom,vbif-qos-setting",

						&vbif_qos_len);

		if (!vbif_qos_arr || (vbif_qos_len & 1)) {

			pr_debug("%s: vbif qos setting not found\n",

				 __func__);

			vbif_qos_len = 0;

		}

		vbif_qos_len /= sizeof(u32);

		pr_debug("%s: vbif_qos_len %d\n", __func__, vbif_qos_len);

		if (cpp_dev->vbif_base) {

			for (i = 0; i < vbif_qos_len; i = i+2) {

				reg = be32_to_cpu(vbif_qos_arr[i]);

				val = be32_to_cpu(vbif_qos_arr[i+1]);

				pr_debug("%s: DT: offset %x, val %x\n",

					 __func__, reg, val);

				pr_debug("%s: before write to register 0x%x\n",

					 __func__, msm_camera_io_r(

					 cpp_dev->vbif_base + reg));

				msm_camera_io_w(val, cpp_dev->vbif_base + reg);

				pr_debug("%s: after write to register 0x%x\n",

					 __func__, msm_camera_io_r(

					 cpp_dev->vbif_base + reg));

			}

		}

	}

}



static int cpp_probe(struct platform_device *pdev)

{