Merge "msm: camerav2: isp: Reserve rdi ub based on image size" (6648eea0) · Commits · e / devices / android_kernel_xiaomi_markw

drivers/media/platform/msm/camera_v2/isp/msm_isp47.c

+26 −41

Original line number	Diff line number	Diff line
		@@ -1706,26 +1706,21 @@ void msm_vfe47_cfg_axi_ub_equal_default(
		uint32_t prop_size = 0;
		uint32_t wm_ub_size;
		uint64_t delta;
		uint32_t rdi_ub_offset;

		if (frame_src == VFE_PIX_0) {
		for (i = 0; i < axi_data->hw_info->num_wm; i++) {
		if (axi_data->free_wm[i] &&
		SRC_TO_INTF(
		HANDLE_TO_IDX(axi_data->free_wm[i])) ==
		VFE_PIX_0) {
		if (axi_data->free_wm[i]) {
		num_used_wms++;
		total_image_size +=
		axi_data->wm_image_size[i];
		}
		}
		ub_offset = (axi_data->hw_info->num_rdi * 2) *
		axi_data->hw_info->min_wm_ub;
		if (!total_image_size) {
		pr_err("%s: Error total_image_size is 0\n", __func__);
		return;
		}
		prop_size = vfe_dev->hw_info->vfe_ops.axi_ops.
		get_ub_size(vfe_dev) -
		axi_data->hw_info->min_wm_ub * (num_used_wms +
		axi_data->hw_info->num_rdi * 2);
		}
		axi_data->hw_info->min_wm_ub * num_used_wms;
		for (i = 0; i < axi_data->hw_info->num_wm; i++) {
		if (!axi_data->free_wm[i]) {
		msm_camera_io_w(0,
		@@ -1737,10 +1732,13 @@ void msm_vfe47_cfg_axi_ub_equal_default(
		HANDLE_TO_IDX(axi_data->free_wm[i])))
		continue;

		if (frame_src == VFE_PIX_0) {
		delta = (uint64_t)axi_data->wm_image_size[i] *
		(uint64_t)prop_size;
		do_div(delta, total_image_size);
		if (frame_src != VFE_PIX_0) {
		if (delta <= axi_data->hw_info->min_wm_ub)
		delta = axi_data->hw_info->min_wm_ub;
		}
		wm_ub_size = axi_data->hw_info->min_wm_ub +
		(uint32_t)delta;
		msm_camera_io_w(ub_offset << 16 \| (wm_ub_size - 1),
		@@ -1748,19 +1746,6 @@ void msm_vfe47_cfg_axi_ub_equal_default(
		vfe_dev->hw_info->vfe_ops.axi_ops.
		ub_reg_offset(vfe_dev, i));
		ub_offset += wm_ub_size;
		} else {

		rdi_ub_offset = (SRC_TO_INTF(
		HANDLE_TO_IDX(axi_data->free_wm[i])) -
		VFE_RAW_0) * 2 *
		axi_data->hw_info->min_wm_ub;
		wm_ub_size = axi_data->hw_info->min_wm_ub * 2;
		msm_camera_io_w((rdi_ub_offset << 16 \|
		(wm_ub_size - 1)),
		vfe_dev->vfe_base +
		vfe_dev->hw_info->vfe_ops.axi_ops.
		ub_reg_offset(vfe_dev, i));
		}
		}
		}