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Commit 662f38d2 authored by Matt Carlson's avatar Matt Carlson Committed by David S. Miller
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[TG3]: Disable GPHY autopowerdown 



New CPMU devices contend with the GPHY for power management.  The GPHY
autopowerdown feature is enabled by default in the PHY and thus needs to
be disabled after every PHY reset.

Signed-off-by: default avatarMatt Carlson <mcarlson@broadcom.com>
Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e875093c

drivers/net/tg3.c

+6 −0
Original line number Diff line number Diff line
@@ -1117,6 +1117,12 @@ static int tg3_phy_reset(struct tg3 *tp) 
			udelay(40);

			tw32_f(TG3_CPMU_LSPD_1000MB_CLK, val);

		}



		/* Disable GPHY autopowerdown. */

		tg3_writephy(tp, MII_TG3_MISC_SHDW,

			     MII_TG3_MISC_SHDW_WREN |

			     MII_TG3_MISC_SHDW_APD_SEL |

			     MII_TG3_MISC_SHDW_APD_WKTM_84MS);

	}



out:

drivers/net/tg3.h

+6 −0
Original line number Diff line number Diff line
@@ -1715,6 +1715,12 @@ 
#define MII_TG3_ISTAT			0x1a /* IRQ status register */

#define MII_TG3_IMASK			0x1b /* IRQ mask register */



#define MII_TG3_MISC_SHDW		0x1c

#define MII_TG3_MISC_SHDW_WREN		0x8000

#define MII_TG3_MISC_SHDW_APD_SEL	0x2800



#define MII_TG3_MISC_SHDW_APD_WKTM_84MS	0x0001



/* ISTAT/IMASK event bits */

#define MII_TG3_INT_LINKCHG		0x0002

#define MII_TG3_INT_SPEEDCHG		0x0004