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Commit 661e338f authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  edac, mce, amd: silence GART TLB errors
  edac, mce: correct corenum reporting
parents 6a5df38f 256f7276
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+7 −17
Original line number Diff line number Diff line
@@ -299,6 +299,12 @@ void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors)
	if (!handle_errors)
		return;

	/*
	 * GART TLB error reporting is disabled by default. Bail out early.
	 */
	if (TLB_ERROR(ec) && !report_gart_errors)
		return;

	pr_emerg(" Northbridge Error, node %d", node_id);

	/*
@@ -310,10 +316,9 @@ void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors)
		if (regs->nbsh & K8_NBSH_ERR_CPU_VAL)
			pr_cont(", core: %u\n", (u8)(regs->nbsh & 0xf));
	} else {
		pr_cont(", core: %d\n", ilog2((regs->nbsh & 0xf)));
		pr_cont(", core: %d\n", fls((regs->nbsh & 0xf) - 1));
	}


	pr_emerg("%s.\n", EXT_ERR_MSG(xec));

	if (BUS_ERROR(ec) && nb_bus_decoder)
@@ -333,21 +338,6 @@ static void amd_decode_fr_mce(u64 mc5_status)
static inline void amd_decode_err_code(unsigned int ec)
{
	if (TLB_ERROR(ec)) {
		/*
		 * GART errors are intended to help graphics driver developers
		 * to detect bad GART PTEs. It is recommended by AMD to disable
		 * GART table walk error reporting by default[1] (currently
		 * being disabled in mce_cpu_quirks()) and according to the
		 * comment in mce_cpu_quirks(), such GART errors can be
		 * incorrectly triggered. We may see these errors anyway and
		 * unless requested by the user, they won't be reported.
		 *
		 * [1] section 13.10.1 on BIOS and Kernel Developers Guide for
		 *     AMD NPT family 0Fh processors
		 */
		if (!report_gart_errors)
			return;

		pr_emerg(" Transaction: %s, Cache Level %s\n",
			 TT_MSG(ec), LL_MSG(ec));
	} else if (MEM_ERROR(ec)) {