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Commit 65be6291 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'phy_reset'

Florian Fainelli says:

====================
net: phy: consolidate PHY reset

This patchset consolidates the PHY reset through the MII BMCR
register by using a central place were this is done.

This patchset resumes the work Kyle Moffett started here:
https://lkml.org/lkml/2011/10/20/301



Note that at this point, drivers doing funky things after issuing
a PHY reset using phy_init_hw() will still suffer from PHY state
machine problems, this will be taken care of later on.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 73713357 0c9eb5b9
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+2 −1
Original line number Diff line number Diff line
@@ -255,7 +255,8 @@ Writing a PHY driver

   config_init: configures PHY into a sane state after a reset.
     For instance, a Davicom PHY requires descrambling disabled.
   probe: Does any setup needed by the driver
   probe: Allocate phy->priv, optionally refuse to bind.
   PHY may not have been reset or had fixups run yet.
   suspend/resume: power management
   config_aneg: Changes the speed/duplex/negotiation settings
   read_status: Reads the current speed/duplex/negotiation settings
+0 −1
Original line number Diff line number Diff line
@@ -1557,7 +1557,6 @@ static int bfin_mac_open(struct net_device *dev)
		return ret;

	phy_start(lp->phydev);
	phy_write(lp->phydev, MII_BMCR, BMCR_RESET);
	setup_system_regs(dev);
	setup_mac_addr(dev->dev_addr);

+1 −1
Original line number Diff line number Diff line
@@ -1361,7 +1361,7 @@ static int greth_mdio_init(struct greth_private *greth)
		timeout = jiffies + 6*HZ;
		while (!phy_aneg_done(greth->phy) && time_before(jiffies, timeout)) {
		}
		genphy_read_status(greth->phy);
		phy_read_status(greth->phy);
		greth_link_change(greth->netdev);
	}

+1 −20
Original line number Diff line number Diff line
@@ -2066,23 +2066,6 @@ static inline void oom_timer_wrapper(unsigned long data)
	napi_schedule(&mp->napi);
}

static void phy_reset(struct mv643xx_eth_private *mp)
{
	int data;

	data = phy_read(mp->phy, MII_BMCR);
	if (data < 0)
		return;

	data |= BMCR_RESET;
	if (phy_write(mp->phy, MII_BMCR, data) < 0)
		return;

	do {
		data = phy_read(mp->phy, MII_BMCR);
	} while (data >= 0 && data & BMCR_RESET);
}

static void port_start(struct mv643xx_eth_private *mp)
{
	u32 pscr;
@@ -2095,7 +2078,7 @@ static void port_start(struct mv643xx_eth_private *mp)
		struct ethtool_cmd cmd;

		mv643xx_eth_get_settings(mp->dev, &cmd);
		phy_reset(mp);
		phy_init_hw(mp->phy);
		mv643xx_eth_set_settings(mp->dev, &cmd);
	}

@@ -2763,8 +2746,6 @@ static void phy_init(struct mv643xx_eth_private *mp, int speed, int duplex)
{
	struct phy_device *phy = mp->phy;

	phy_reset(mp);

	if (speed == 0) {
		phy->autoneg = AUTONEG_ENABLE;
		phy->speed = 0;
+1 −19
Original line number Diff line number Diff line
@@ -320,23 +320,6 @@ static void ethernet_phy_set_addr(struct pxa168_eth_private *pep, int phy_addr)
	wrl(pep, PHY_ADDRESS, reg_data);
}

static void ethernet_phy_reset(struct pxa168_eth_private *pep)
{
	int data;

	data = phy_read(pep->phy, MII_BMCR);
	if (data < 0)
		return;

	data |= BMCR_RESET;
	if (phy_write(pep->phy, MII_BMCR, data) < 0)
		return;

	do {
		data = phy_read(pep->phy, MII_BMCR);
	} while (data >= 0 && data & BMCR_RESET);
}

static void rxq_refill(struct net_device *dev)
{
	struct pxa168_eth_private *pep = netdev_priv(dev);
@@ -645,7 +628,7 @@ static void eth_port_start(struct net_device *dev)
		struct ethtool_cmd cmd;

		pxa168_get_settings(pep->dev, &cmd);
		ethernet_phy_reset(pep);
		phy_init_hw(pep->phy);
		pxa168_set_settings(pep->dev, &cmd);
	}

@@ -1382,7 +1365,6 @@ static struct phy_device *phy_scan(struct pxa168_eth_private *pep, int phy_addr)
static void phy_init(struct pxa168_eth_private *pep, int speed, int duplex)
{
	struct phy_device *phy = pep->phy;
	ethernet_phy_reset(pep);

	phy_attach(pep->dev, dev_name(&phy->dev), PHY_INTERFACE_MODE_MII);

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