Loading arch/arm/mach-omap2/gpmc.c +2 −4 Original line number Diff line number Diff line Loading @@ -429,18 +429,16 @@ void __init gpmc_init(void) gpmc_l3_clk = clk_get(NULL, ck); if (IS_ERR(gpmc_l3_clk)) { printk(KERN_ERR "Could not get GPMC clock %s\n", ck); return -ENODEV; BUG(); } gpmc_base = ioremap(l, SZ_4K); if (!gpmc_base) { clk_put(gpmc_l3_clk); printk(KERN_ERR "Could not get GPMC register memory\n"); return -ENOMEM; BUG(); } BUG_ON(IS_ERR(gpmc_l3_clk)); l = gpmc_read_reg(GPMC_REVISION); printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); /* Set smart idle mode and automatic L3 clock gating */ Loading arch/arm/plat-omap/clock.c +10 −10 Original line number Diff line number Diff line Loading @@ -428,23 +428,23 @@ static int clk_debugfs_register_one(struct clk *c) if (c->id != 0) sprintf(p, ":%d", c->id); d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); if (IS_ERR(d)) return PTR_ERR(d); if (!d) return -ENOMEM; c->dent = d; d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount); if (IS_ERR(d)) { err = PTR_ERR(d); if (!d) { err = -ENOMEM; goto err_out; } d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); if (IS_ERR(d)) { err = PTR_ERR(d); if (!d) { err = -ENOMEM; goto err_out; } d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); if (IS_ERR(d)) { err = PTR_ERR(d); if (!d) { err = -ENOMEM; goto err_out; } return 0; Loading Loading @@ -483,8 +483,8 @@ static int __init clk_debugfs_init(void) int err; d = debugfs_create_dir("clock", NULL); if (IS_ERR(d)) return PTR_ERR(d); if (!d) return -ENOMEM; clk_debugfs_root = d; list_for_each_entry(c, &clocks, node) { Loading arch/arm/plat-omap/include/mach/entry-macro.S +3 −1 Original line number Diff line number Diff line Loading @@ -65,7 +65,8 @@ #include <mach/omap34xx.h> #endif #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */ #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */ #define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */ .macro disable_fiq .endm Loading @@ -88,6 +89,7 @@ cmp \irqnr, #0x0 2222: ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ .endm Loading arch/arm/plat-omap/include/mach/irqs.h +1 −1 Original line number Diff line number Diff line Loading @@ -372,7 +372,7 @@ /* External TWL4030 gpio interrupts are optional */ #define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END #ifdef CONFIG_TWL4030_GPIO #ifdef CONFIG_GPIO_TWL4030 #define TWL4030_GPIO_NR_IRQS 18 #else #define TWL4030_GPIO_NR_IRQS 0 Loading Loading
arch/arm/mach-omap2/gpmc.c +2 −4 Original line number Diff line number Diff line Loading @@ -429,18 +429,16 @@ void __init gpmc_init(void) gpmc_l3_clk = clk_get(NULL, ck); if (IS_ERR(gpmc_l3_clk)) { printk(KERN_ERR "Could not get GPMC clock %s\n", ck); return -ENODEV; BUG(); } gpmc_base = ioremap(l, SZ_4K); if (!gpmc_base) { clk_put(gpmc_l3_clk); printk(KERN_ERR "Could not get GPMC register memory\n"); return -ENOMEM; BUG(); } BUG_ON(IS_ERR(gpmc_l3_clk)); l = gpmc_read_reg(GPMC_REVISION); printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); /* Set smart idle mode and automatic L3 clock gating */ Loading
arch/arm/plat-omap/clock.c +10 −10 Original line number Diff line number Diff line Loading @@ -428,23 +428,23 @@ static int clk_debugfs_register_one(struct clk *c) if (c->id != 0) sprintf(p, ":%d", c->id); d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); if (IS_ERR(d)) return PTR_ERR(d); if (!d) return -ENOMEM; c->dent = d; d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount); if (IS_ERR(d)) { err = PTR_ERR(d); if (!d) { err = -ENOMEM; goto err_out; } d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); if (IS_ERR(d)) { err = PTR_ERR(d); if (!d) { err = -ENOMEM; goto err_out; } d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); if (IS_ERR(d)) { err = PTR_ERR(d); if (!d) { err = -ENOMEM; goto err_out; } return 0; Loading Loading @@ -483,8 +483,8 @@ static int __init clk_debugfs_init(void) int err; d = debugfs_create_dir("clock", NULL); if (IS_ERR(d)) return PTR_ERR(d); if (!d) return -ENOMEM; clk_debugfs_root = d; list_for_each_entry(c, &clocks, node) { Loading
arch/arm/plat-omap/include/mach/entry-macro.S +3 −1 Original line number Diff line number Diff line Loading @@ -65,7 +65,8 @@ #include <mach/omap34xx.h> #endif #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */ #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */ #define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */ .macro disable_fiq .endm Loading @@ -88,6 +89,7 @@ cmp \irqnr, #0x0 2222: ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ .endm Loading
arch/arm/plat-omap/include/mach/irqs.h +1 −1 Original line number Diff line number Diff line Loading @@ -372,7 +372,7 @@ /* External TWL4030 gpio interrupts are optional */ #define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END #ifdef CONFIG_TWL4030_GPIO #ifdef CONFIG_GPIO_TWL4030 #define TWL4030_GPIO_NR_IRQS 18 #else #define TWL4030_GPIO_NR_IRQS 0 Loading