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Commit 64f996f6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-fixes-for-linus' of... 

Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86: cpu_init(): fix memory leak when using CPU hotplug
  x86: pda_init(): fix memory leak when using CPU hotplug
  x86, xen: Use native_pte_flags instead of native_pte_val for .pte_flags
  x86: move mtrr cpu cap setting early in early_init_xxxx
  x86: delay early cpu initialization until cpuid is done
  x86: use X86_FEATURE_NOPL in alternatives
  x86: add NOPL as a synthetic CPU feature bit
  x86: boot: stub out unimplemented CPU feature words
parents f5325225 23952a96

arch/x86/boot/cpucheck.c

+4 −4
Original line number Diff line number Diff line
@@ -38,12 +38,12 @@ static const u32 req_flags[NCAPINTS] = 
{

	REQUIRED_MASK0,

	REQUIRED_MASK1,

	REQUIRED_MASK2,

	REQUIRED_MASK3,

	0, /* REQUIRED_MASK2 not implemented in this file */

	0, /* REQUIRED_MASK3 not implemented in this file */

	REQUIRED_MASK4,

	REQUIRED_MASK5,

	0, /* REQUIRED_MASK5 not implemented in this file */

	REQUIRED_MASK6,

	REQUIRED_MASK7,

	0, /* REQUIRED_MASK7 not implemented in this file */

};



#define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a))

arch/x86/kernel/alternative.c

+13 −23
Original line number Diff line number Diff line
@@ -145,35 +145,25 @@ static const unsigned char *const p6_nops[ASM_NOP_MAX+1] = { 
extern char __vsyscall_0;

const unsigned char *const *find_nop_table(void)

{

	return boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||

	       boot_cpu_data.x86 < 6 ? k8_nops : p6_nops;

	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&

	    boot_cpu_has(X86_FEATURE_NOPL))

		return p6_nops;

	else

		return k8_nops;

}



#else /* CONFIG_X86_64 */



static const struct nop {

	int cpuid;

	const unsigned char *const *noptable;

} noptypes[] = {

	{ X86_FEATURE_K8, k8_nops },

	{ X86_FEATURE_K7, k7_nops },

	{ X86_FEATURE_P4, p6_nops },

	{ X86_FEATURE_P3, p6_nops },

	{ -1, NULL }

};



const unsigned char *const *find_nop_table(void)

{

	const unsigned char *const *noptable = intel_nops;

	int i;



	for (i = 0; noptypes[i].cpuid >= 0; i++) {

		if (boot_cpu_has(noptypes[i].cpuid)) {

			noptable = noptypes[i].noptable;

			break;

		}

	}

	return noptable;

	if (boot_cpu_has(X86_FEATURE_K8))

		return k8_nops;

	else if (boot_cpu_has(X86_FEATURE_K7))

		return k7_nops;

	else if (boot_cpu_has(X86_FEATURE_NOPL))

		return p6_nops;

	else

		return intel_nops;

}



#endif /* CONFIG_X86_64 */

arch/x86/kernel/cpu/amd.c

+5 −4
Original line number Diff line number Diff line
@@ -31,6 +31,11 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) 
		if (c->x86_power & (1<<8))

			set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);

	}



	/*  Set MTRR capability flag if appropriate */

	if (c->x86_model == 13 || c->x86_model == 9 ||

	   (c->x86_model == 8 && c->x86_mask >= 8))

		set_cpu_cap(c, X86_FEATURE_K6_MTRR);

}



static void __cpuinit init_amd(struct cpuinfo_x86 *c)
@@ -166,10 +171,6 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) 
						mbytes);

				}



				/*  Set MTRR capability flag if appropriate */

				if (c->x86_model == 13 || c->x86_model == 9 ||

				   (c->x86_model == 8 && c->x86_mask >= 8))

					set_cpu_cap(c, X86_FEATURE_K6_MTRR);

				break;

			}

arch/x86/kernel/cpu/centaur.c

+11 −0
Original line number Diff line number Diff line
@@ -314,6 +314,16 @@ enum { 
		EAMD3D		= 1<<20,

};



static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)

{

	switch (c->x86) {

	case 5:

		/* Emulate MTRRs using Centaur's MCR. */

		set_cpu_cap(c, X86_FEATURE_CENTAUR_MCR);

		break;

	}

}



static void __cpuinit init_centaur(struct cpuinfo_x86 *c)

{
@@ -462,6 +472,7 @@ centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size) 
static struct cpu_dev centaur_cpu_dev __cpuinitdata = {

	.c_vendor	= "Centaur",

	.c_ident	= { "CentaurHauls" },

	.c_early_init	= early_init_centaur,

	.c_init		= init_centaur,

	.c_size_cache	= centaur_size_cache,

};

arch/x86/kernel/cpu/common.c

+32 −2
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
#include <asm/mtrr.h>

#include <asm/mce.h>

#include <asm/pat.h>

#include <asm/asm.h>

#ifdef CONFIG_X86_LOCAL_APIC

#include <asm/mpspec.h>

#include <asm/apic.h>
@@ -334,11 +335,40 @@ static void __init early_cpu_detect(void) 


	get_cpu_vendor(c, 1);



	early_get_cap(c);



	if (c->x86_vendor != X86_VENDOR_UNKNOWN &&

	    cpu_devs[c->x86_vendor]->c_early_init)

		cpu_devs[c->x86_vendor]->c_early_init(c);

}



	early_get_cap(c);

/*

 * The NOPL instruction is supposed to exist on all CPUs with

 * family >= 6, unfortunately, that's not true in practice because

 * of early VIA chips and (more importantly) broken virtualizers that

 * are not easy to detect.  Hence, probe for it based on first

 * principles.

 */

static void __cpuinit detect_nopl(struct cpuinfo_x86 *c)

{

	const u32 nopl_signature = 0x888c53b1; /* Random number */

	u32 has_nopl = nopl_signature;



	clear_cpu_cap(c, X86_FEATURE_NOPL);

	if (c->x86 >= 6) {

		asm volatile("\n"

			     "1:      .byte 0x0f,0x1f,0xc0\n" /* nopl %eax */

			     "2:\n"

			     "        .section .fixup,\"ax\"\n"

			     "3:      xor %0,%0\n"

			     "        jmp 2b\n"

			     "        .previous\n"

			     _ASM_EXTABLE(1b,3b)

			     : "+a" (has_nopl));



		if (has_nopl == nopl_signature)

			set_cpu_cap(c, X86_FEATURE_NOPL);

	}

}



static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
@@ -395,8 +425,8 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) 
		}



		init_scattered_cpuid_features(c);

		detect_nopl(c);

	}



}



static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)