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Commit 64db880e authored by David S. Miller's avatar David S. Miller
Browse files
parents 5ca3b72c 7a73b08b
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+1 −3
Original line number Diff line number Diff line
@@ -169,10 +169,8 @@ int bcma_bus_register(struct bcma_bus *bus)
	err = bcma_sprom_get(bus);
	if (err == -ENOENT) {
		pr_err("No SPROM available\n");
	} else if (err) {
	} else if (err)
		pr_err("Failed to get SPROM: %d\n", err);
		return -ENOENT;
	}

	/* Register found cores */
	bcma_register_cores(bus);
+5 −2
Original line number Diff line number Diff line
@@ -1037,13 +1037,16 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)

	/*
	 * Workaround for early ACK timeouts, add an offset to match the
	 * initval's 64us ack timeout value.
	 * initval's 64us ack timeout value. Use 48us for the CTS timeout.
	 * This was initially only meant to work around an issue with delayed
	 * BA frames in some implementations, but it has been found to fix ACK
	 * timeout issues in other cases as well.
	 */
	if (conf->channel && conf->channel->band == IEEE80211_BAND_2GHZ)
	if (conf->channel && conf->channel->band == IEEE80211_BAND_2GHZ) {
		acktimeout += 64 - sifstime - ah->slottime;
		ctstimeout += 48 - sifstime - ah->slottime;
	}


	ath9k_hw_set_sifs_time(ah, sifstime);
	ath9k_hw_setslottime(ah, slottime);
+5 −4
Original line number Diff line number Diff line
@@ -822,6 +822,11 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
		ARRAY_SIZE(ath9k_tpt_blink));
#endif

	INIT_WORK(&sc->hw_reset_work, ath_reset_work);
	INIT_WORK(&sc->hw_check_work, ath_hw_check);
	INIT_WORK(&sc->paprd_work, ath_paprd_calibrate);
	INIT_DELAYED_WORK(&sc->hw_pll_work, ath_hw_pll_work);

	/* Register with mac80211 */
	error = ieee80211_register_hw(hw);
	if (error)
@@ -840,10 +845,6 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
			goto error_world;
	}

	INIT_WORK(&sc->hw_reset_work, ath_reset_work);
	INIT_WORK(&sc->hw_check_work, ath_hw_check);
	INIT_WORK(&sc->paprd_work, ath_paprd_calibrate);
	INIT_DELAYED_WORK(&sc->hw_pll_work, ath_hw_pll_work);
	sc->last_rssi = ATH_RSSI_DUMMY_MARKER;

	ath_init_leds(sc);
+1 −1
Original line number Diff line number Diff line
@@ -694,7 +694,7 @@ static u8 ath_rc_get_highest_rix(struct ath_softc *sc,
		return rate;

	/* This should not happen */
	WARN_ON(1);
	WARN_ON_ONCE(1);

	rate = ath_rc_priv->valid_rate_index[0];

+8 −0
Original line number Diff line number Diff line
@@ -822,6 +822,14 @@ static bool ath9k_rx_accept(struct ath_common *common,
		(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC |
		 ATH9K_RXERR_KEYMISS));

	/*
	 * Key miss events are only relevant for pairwise keys where the
	 * descriptor does contain a valid key index. This has been observed
	 * mostly with CCMP encryption.
	 */
	if (rx_stats->rs_keyix == ATH9K_RXKEYIX_INVALID)
		rx_stats->rs_status &= ~ATH9K_RXERR_KEYMISS;

	if (!rx_stats->rs_datalen)
		return false;
        /*
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