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Commit 64acba6a authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-fixes 

Daniel writes:
The big thing is the disabling of the hsw support by default, cc: stable.
We've aimed for basic hsw support in 3.6, but due to a few bad
happenstances we've screwed up and only 3.8 will have better modeset
support than vesa. To avoid yet another round of fallout from such a
gaffle on for the next platform we've added a module option to disable
early hw support by default. That should also give us more flexibility in
bring-up.

 Otherwise just small fixes:
 - 3 fixes from Egbert for sdvo corner cases
 - invert-brightness quirk entry from Egbert
 - revert a dp link training change, it regresses some setups
 - and shut up a spurious WARN in our gem fault handler.
 - regression fix for an oops on bit17 swizzling machines, introduce in 3.7
 - another no-lvds quirk

* 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel:
  drm/i915: Initialize obj->pages before use by i915_gem_object_do_bit17_swizzle()
  drm/i915: Add no-lvds quirk for Supermicro X7SPA-H
  drm/i915: Insert i915_preliminary_hw_support variable.
  drm/i915: shut up spurious WARN in the gtt fault handler
  Revert "drm/i915: Try harder to complete DP training pattern 1"
  DRM/i915: Restore sdvo_flags after dtd->mode->dtd Roundrtrip.
  DRM/i915: Don't clone SDVO LVDS with analog.
  DRM/i915: Add QUIRK_INVERT_BRIGHTNESS for NCR machines.
  DRM/i915: Don't delete DPLL Multiplier during DAC init.
parents 6f0c0580 74ce6b6c

drivers/gpu/drm/i915/i915_drv.c

+13 −0
Original line number Diff line number Diff line
@@ -118,6 +118,13 @@ module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600); 
MODULE_PARM_DESC(i915_enable_ppgtt,

		"Enable PPGTT (default: true)");



unsigned int i915_preliminary_hw_support __read_mostly = 0;

module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600);

MODULE_PARM_DESC(preliminary_hw_support,

		"Enable preliminary hardware support. "

		"Enable Haswell and ValleyView Support. "

		"(default: false)");



static struct drm_driver driver;

extern int intel_agp_enabled;
@@ -826,6 +833,12 @@ i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 
	struct intel_device_info *intel_info =

		(struct intel_device_info *) ent->driver_data;



	if (intel_info->is_haswell || intel_info->is_valleyview)

		if(!i915_preliminary_hw_support) {

			DRM_ERROR("Preliminary hardware support disabled\n");

			return -ENODEV;

		}



	/* Only bind to function 0 of the device. Early generations

	 * used function 1 as a placeholder for multi-head. This causes

	 * us confusion instead, especially on the systems where both

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -1217,6 +1217,7 @@ extern int i915_enable_rc6 __read_mostly; 
extern int i915_enable_fbc __read_mostly;

extern bool i915_enable_hangcheck __read_mostly;

extern int i915_enable_ppgtt __read_mostly;

extern unsigned int i915_preliminary_hw_support __read_mostly;



extern int i915_suspend(struct drm_device *dev, pm_message_t state);

extern int i915_resume(struct drm_device *dev);

drivers/gpu/drm/i915/i915_gem.c

+5 −2
Original line number Diff line number Diff line
@@ -1407,8 +1407,10 @@ out: 
		return VM_FAULT_NOPAGE;

	case -ENOMEM:

		return VM_FAULT_OOM;

	case -ENOSPC:

		return VM_FAULT_SIGBUS;

	default:

		WARN_ON_ONCE(ret);

		WARN_ONCE(ret, "unhandled error in i915_gem_fault: %i\n", ret);

		return VM_FAULT_SIGBUS;

	}

}
@@ -1822,10 +1824,11 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj) 
		sg_set_page(sg, page, PAGE_SIZE, 0);

	}



	obj->pages = st;



	if (i915_gem_object_needs_bit17_swizzle(obj))

		i915_gem_object_do_bit_17_swizzle(obj);



	obj->pages = st;

	return 0;



err_pages:

drivers/gpu/drm/i915/intel_crt.c

+1 −14
Original line number Diff line number Diff line
@@ -219,20 +219,7 @@ static void intel_crt_mode_set(struct drm_encoder *encoder, 
		intel_encoder_to_crt(to_intel_encoder(encoder));

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	struct drm_i915_private *dev_priv = dev->dev_private;

	int dpll_md_reg;

	u32 adpa, dpll_md;



	dpll_md_reg = DPLL_MD(intel_crtc->pipe);



	/*

	 * Disable separate mode multiplier used when cloning SDVO to CRT

	 * XXX this needs to be adjusted when we really are cloning

	 */

	if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {

		dpll_md = I915_READ(dpll_md_reg);

		I915_WRITE(dpll_md_reg,

			   dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);

	}

	u32 adpa;



	adpa = ADPA_HOTPLUG_BITS;

	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)

drivers/gpu/drm/i915/intel_display.c

+32 −0
Original line number Diff line number Diff line
@@ -7892,6 +7892,34 @@ struct intel_quirk { 
	void (*hook)(struct drm_device *dev);

};



/* For systems that don't have a meaningful PCI subdevice/subvendor ID */

struct intel_dmi_quirk {

	void (*hook)(struct drm_device *dev);

	const struct dmi_system_id (*dmi_id_list)[];

};



static int intel_dmi_reverse_brightness(const struct dmi_system_id *id)

{

	DRM_INFO("Backlight polarity reversed on %s\n", id->ident);

	return 1;

}



static const struct intel_dmi_quirk intel_dmi_quirks[] = {

	{

		.dmi_id_list = &(const struct dmi_system_id[]) {

			{

				.callback = intel_dmi_reverse_brightness,

				.ident = "NCR Corporation",

				.matches = {DMI_MATCH(DMI_SYS_VENDOR, "NCR Corporation"),

					    DMI_MATCH(DMI_PRODUCT_NAME, ""),

				},

			},

			{ }  /* terminating entry */

		},

		.hook = quirk_invert_brightness,

	},

};



static struct intel_quirk intel_quirks[] = {

	/* HP Mini needs pipe A force quirk (LP: #322104) */

	{ 0x27ae, 0x103c, 0x361a, quirk_pipea_force },
@@ -7931,6 +7959,10 @@ static void intel_init_quirks(struct drm_device *dev) 
		     q->subsystem_device == PCI_ANY_ID))

			q->hook(dev);

	}

	for (i = 0; i < ARRAY_SIZE(intel_dmi_quirks); i++) {

		if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0)

			intel_dmi_quirks[i].hook(dev);

	}

}



/* Disable the VGA plane that we never use */