Loading arch/x86/kernel/amd_iommu.c +31 −0 Original line number Diff line number Diff line Loading @@ -1788,4 +1788,35 @@ static void amd_iommu_unmap_range(struct iommu_domain *dom, iommu_flush_domain(domain->id); } static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, unsigned long iova) { struct protection_domain *domain = dom->priv; unsigned long offset = iova & ~PAGE_MASK; phys_addr_t paddr; u64 *pte; pte = &domain->pt_root[IOMMU_PTE_L2_INDEX(iova)]; if (!IOMMU_PTE_PRESENT(*pte)) return 0; pte = IOMMU_PTE_PAGE(*pte); pte = &pte[IOMMU_PTE_L1_INDEX(iova)]; if (!IOMMU_PTE_PRESENT(*pte)) return 0; pte = IOMMU_PTE_PAGE(*pte); pte = &pte[IOMMU_PTE_L0_INDEX(iova)]; if (!IOMMU_PTE_PRESENT(*pte)) return 0; paddr = *pte & IOMMU_PAGE_MASK; paddr |= offset; return paddr; } #endif Loading
arch/x86/kernel/amd_iommu.c +31 −0 Original line number Diff line number Diff line Loading @@ -1788,4 +1788,35 @@ static void amd_iommu_unmap_range(struct iommu_domain *dom, iommu_flush_domain(domain->id); } static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, unsigned long iova) { struct protection_domain *domain = dom->priv; unsigned long offset = iova & ~PAGE_MASK; phys_addr_t paddr; u64 *pte; pte = &domain->pt_root[IOMMU_PTE_L2_INDEX(iova)]; if (!IOMMU_PTE_PRESENT(*pte)) return 0; pte = IOMMU_PTE_PAGE(*pte); pte = &pte[IOMMU_PTE_L1_INDEX(iova)]; if (!IOMMU_PTE_PRESENT(*pte)) return 0; pte = IOMMU_PTE_PAGE(*pte); pte = &pte[IOMMU_PTE_L0_INDEX(iova)]; if (!IOMMU_PTE_PRESENT(*pte)) return 0; paddr = *pte & IOMMU_PAGE_MASK; paddr |= offset; return paddr; } #endif