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Commit 64322367 authored by Honghao Liu's avatar Honghao Liu
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ASoC: msm: add support for TDM devices



Add backend TDM device support to utilize the TDM data transfer
interface between APQ and CODEC HW on automotive platform.
Changes include:
    Add AFE TDM interface API support.
    Support TDM port configuration, slot mapping and custom header
    as well as update TDM group device configuration and enablement.
    Add routing path for TDM backend devices.
    Add TDM device CPU DAI driver including kcontrol, initialization
    and standard operations.
    Add TDM frontend DAI links for hostless/loopback usecase.
    Add binding information for TDM device in device tree.

Change-Id: I0f1650e32f31fb073d4d3878c188cb698ea7a5f0
Signed-off-by: default avatarHonghao Liu <honghaol@codeaurora.org>
parent 153cc9a3
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+164 −0
Original line number Diff line number Diff line
@@ -1080,6 +1080,170 @@ Example:
		asoc-codec-names = "msm-stub-codec.1";
	};

* msm-dai-tdm

[First Level Nodes]

Required properties:

 - compatible : "qcom,msm-dai-tdm"
 - qcom,msm-cpudai-tdm-group-id: ID of the group device. TDM interface
				supports up to 8 groups:
				Primary RX: 	37120
				Primary TX: 	37121
				Secondary RX: 	37136
				Secondary TX: 	37137
				Tertiary RX: 	37152
				Tertiary TX: 	37153
				Quaternary RX: 	37168
				Quaternary TX: 	37169

 - qcom,msm-cpudai-tdm-group-num-ports:	Number of ports in
				msm-cpudai-tdm-group-port-id array.
				Max number of ports supported by DSP is 8.

 - qcom,msm-cpudai-tdm-group-port-id: Array of TDM port IDs of the group.
				The size of the array is determined by
				the value in msm-cpudai-tdm-group-num-ports.
				Each group supports up to 8 ports:
				Primary RX: 	36864, 36866, 36868, 36870,
								36872, 36874, 36876, 36878
				Primary TX: 	36865, 36867, 36869, 36871,
								36873, 36875, 36877, 36879
				Secondary RX: 	36880, 36882, 36884, 36886,
								36888, 36890, 36892, 36894
				Secondary TX:	36881, 36883, 36885, 36887,
								36889, 36891, 36893, 36895
				Tertiary RX: 	36896, 36898, 36900, 36902,
								36904, 36906, 36908, 36910
				Tertiary TX: 	36897, 36899, 36901, 36903,
								36905, 36907, 36909, 36911
				Quaternary RX:	36912, 36914, 36916, 36918,
								36920, 36922, 36924, 36926
				Quaternary TX:	36913, 36915, 36917, 36919,
								36921, 36923, 36925, 36927

 - qcom,msm-cpudai-tdm-group-nslots-per-frame: Number of slots per TDM frame.
				Supported value: 1 to 32.

 - qcom,msm-cpudai-tdm-group-slot-width: Slot width of the slot in a TDM frame.
				Supported value: 16, 24, 32.

 - qcom,msm-cpudai-tdm-group-slot-mask: Position of active slots.
				When that bit is set, that paricular slot is active.
				Number of active slots can be inferred by
				number of bits set in the mask.
				Only 8 individual bits can be enabled.
				Bits 0 to 31 corresponding to slot 0 to 31.
				Supported: 1 to 2^32 - 1.

 - qcom,msm-cpudai-tdm-clk-rate: Clock rate for tdm - 12288000.
				When clock rate is set to zero,
				then external clock is assumed.

 [Second Level Nodes]

Required properties:

 - compatible : "qcom,msm-dai-q6-tdm"
 - qcom,msm-dai-q6-mi2s-dev-id: TDM port ID.

 - qcom,msm-cpudai-tdm-sync-mode: Synchronization setting.
				0 - Short sync bit mode
				1 - Long sync mode
				2 - Short sync slot mode

 - qcom,msm-cpudai-tdm-sync-src: Synchronization source.
				0 - External source
				1 - Internal source

 - qcom,msm-cpudai-tdm-data-out: Data out signal to drive with other masters.
				0 - Disable
				1 - Enable

 - qcom,msm-cpudai-tdm-invert-sync: Invert the sync.
				0 - Normal
				1 - Invert

 - qcom,msm-cpudai-tdm-data-delay: Number of bit clock to delay data
				with respect to sync edge.
				0 - 0 bit clock cycle
				1 - 1 bit clock cycle
				2 - 2 bit clock cycle

Optional properties:

 - qcom,msm-cpudai-tdm-num-offset: Number of slot mapping start offsets in
				qcom,msm-cpudai-tdm-offset array. The number of array
				corresponds to the channel number configuration.
				For example, the first array is for 1 channel configuration.
				Offset setting is per channel based.
				This is board specific configuration.
				The max num of channel supported is 8.

 - qcom,msm-cpudai-tdm-offset: Array of the slot mapping start offset in bytes
				for this frame. The bytes is counted from 0.
				0 is mapped to the 1st byte in or out of
				the digital serial data line this sub-frame belongs to.
				This is board specific configuration.
				Max number of offsets supported by DSP is 8.

 - qcom,msm-cpudai-tdm-offset-data-align: Indicate how data is packed
				within the slot. For example, 32 slot width in case of
				sample bit width is 24.
				0 - MSB
				1 - LSB

 - qcom,msm-cpudai-tdm-header-start-offset: TDM Custom header start offset
				in bytes from this sub-frame. The bytes is counted from 0.
				0 is mapped to the 1st byte in or out of
				the digital serial data line this sub-frame belong to.
				Supported value: 0, 4, 8.

 - qcom,msm-cpudai-tdm-header-width: Header width per frame followed.
				2 bytes for MOST/TDM case.
				Supported value: 2.

 - qcom,msm-cpudai-tdm-header-num-frame-repeat: Number of header followed.
				Supported value: 8.

 - pinctrl-names: Pinctrl state names for each pin group
				configuration.
 - pinctrl-x: Defines pinctrl state for each pin group.

Example:

	qcom,msm-dai-tdm-quat-rx {
		compatible = "qcom,msm-dai-tdm";
		qcom,msm-cpudai-tdm-group-id = <37168>;
		qcom,msm-cpudai-tdm-group-num-ports = <1>;
		qcom,msm-cpudai-tdm-group-port-id = <36912>;
		qcom,msm-cpudai-tdm-group-nslots-per-frame = <8>;
		qcom,msm-cpudai-tdm-group-slot-width = <32>;
		qcom,msm-cpudai-tdm-group-slot-mask = <255>;
		qcom,msm-cpudai-tdm-clk-rate = <12288000>;
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&quat_tdm_active &quat_tdm_dio_active>;
		pinctrl-1 = <&quat_tdm_sleep &quat_tdm_dio_sleep>;
		dai_quat_tdm_rx_0: qcom,msm-dai-q6-tdm-quat-rx-0 {
			compatible = "qcom,msm-dai-q6-tdm";
			qcom,msm-cpudai-tdm-dev-id = <36912>;
			qcom,msm-cpudai-tdm-sync-mode = <0>;
			qcom,msm-cpudai-tdm-sync-src = <1>;
			qcom,msm-cpudai-tdm-data-out = <0>;
			qcom,msm-cpudai-tdm-invert-sync = <0>;
			qcom,msm-cpudai-tdm-data-delay = <0>;
			qcom,msm-cpudai-tdm-num-offset = <1>, <2>, <3>,
					<4>, <5>, <6>;
			qcom,msm-cpudai-tdm-offset = <0>, <0 4>, <0 4 8>,
					<0 4 8 12>, <0 4 8 12 16>, <0 4 8 12 16 20>;
			qcom,msm-cpudai-tdm-offset-data-align = <0>;
			qcom,msm-cpudai-tdm-header-start-offset = <0>;
			qcom,msm-cpudai-tdm-header-width = <2>;
			qcom,msm-cpudai-tdm-header-num-frame-repeat = <8>;
		};
	};

* MSM8996 ASoC Machine driver

Required properties:
+601 −6

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+32 −0
Original line number Diff line number Diff line
@@ -57,4 +57,36 @@ struct msm_i2s_data {
	u32 capability; /* RX or TX */
	u16 sd_lines;
};

struct msm_dai_tdm_group_config {
	u16 group_id;
	u16 num_ports;
	u16 *port_id;
	u16 nslots_per_frame;
	u16 slot_width;
	u32 slot_mask;
	u32 clk_rate;
};

struct msm_dai_tdm_config {
	u16 sync_mode;
	u16 sync_src;
	u16 data_out;
	u16 invert_sync;
	u16 data_delay;
	u32 offset_data_align;
	u16 num_offset;
	u16 *offset;
	u16  header_start_offset;
	u16  header_width;
	u16  header_num_frame_repeat;
};

#define MSM_DAI_TDM_MAX_CH	8

struct msm_dai_tdm_pdata {
	struct msm_dai_tdm_group_config group_config;
	struct msm_dai_tdm_config config[MSM_DAI_TDM_MAX_CH];
};

#endif
+78 −3
Original line number Diff line number Diff line
@@ -100,11 +100,76 @@ enum {
	IDX_SPDIF_RX,
	IDX_GLOBAL_CFG,
	IDX_AUDIO_PORT_ID_I2S_RX,
	/* IDX 50->54 */
	/* IDX 50->53 */
	IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_SD1,
	IDX_AFE_PORT_ID_QUINARY_MI2S_RX,
	IDX_AFE_PORT_ID_QUINARY_MI2S_TX,
	IDX_AFE_PORT_ID_SENARY_MI2S_TX,
	/* IDX 54-> 118 */
	IDX_AFE_PORT_ID_PRIMARY_TDM_RX_0,
	IDX_AFE_PORT_ID_PRIMARY_TDM_TX_0,
	IDX_AFE_PORT_ID_PRIMARY_TDM_RX_1,
	IDX_AFE_PORT_ID_PRIMARY_TDM_TX_1,
	IDX_AFE_PORT_ID_PRIMARY_TDM_RX_2,
	IDX_AFE_PORT_ID_PRIMARY_TDM_TX_2,
	IDX_AFE_PORT_ID_PRIMARY_TDM_RX_3,
	IDX_AFE_PORT_ID_PRIMARY_TDM_TX_3,
	IDX_AFE_PORT_ID_PRIMARY_TDM_RX_4,
	IDX_AFE_PORT_ID_PRIMARY_TDM_TX_4,
	IDX_AFE_PORT_ID_PRIMARY_TDM_RX_5,
	IDX_AFE_PORT_ID_PRIMARY_TDM_TX_5,
	IDX_AFE_PORT_ID_PRIMARY_TDM_RX_6,
	IDX_AFE_PORT_ID_PRIMARY_TDM_TX_6,
	IDX_AFE_PORT_ID_PRIMARY_TDM_RX_7,
	IDX_AFE_PORT_ID_PRIMARY_TDM_TX_7,
	IDX_AFE_PORT_ID_SECONDARY_TDM_RX_0,
	IDX_AFE_PORT_ID_SECONDARY_TDM_TX_0,
	IDX_AFE_PORT_ID_SECONDARY_TDM_RX_1,
	IDX_AFE_PORT_ID_SECONDARY_TDM_TX_1,
	IDX_AFE_PORT_ID_SECONDARY_TDM_RX_2,
	IDX_AFE_PORT_ID_SECONDARY_TDM_TX_2,
	IDX_AFE_PORT_ID_SECONDARY_TDM_RX_3,
	IDX_AFE_PORT_ID_SECONDARY_TDM_TX_3,
	IDX_AFE_PORT_ID_SECONDARY_TDM_RX_4,
	IDX_AFE_PORT_ID_SECONDARY_TDM_TX_4,
	IDX_AFE_PORT_ID_SECONDARY_TDM_RX_5,
	IDX_AFE_PORT_ID_SECONDARY_TDM_TX_5,
	IDX_AFE_PORT_ID_SECONDARY_TDM_RX_6,
	IDX_AFE_PORT_ID_SECONDARY_TDM_TX_6,
	IDX_AFE_PORT_ID_SECONDARY_TDM_RX_7,
	IDX_AFE_PORT_ID_SECONDARY_TDM_TX_7,
	IDX_AFE_PORT_ID_TERTIARY_TDM_RX_0,
	IDX_AFE_PORT_ID_TERTIARY_TDM_TX_0,
	IDX_AFE_PORT_ID_TERTIARY_TDM_RX_1,
	IDX_AFE_PORT_ID_TERTIARY_TDM_TX_1,
	IDX_AFE_PORT_ID_TERTIARY_TDM_RX_2,
	IDX_AFE_PORT_ID_TERTIARY_TDM_TX_2,
	IDX_AFE_PORT_ID_TERTIARY_TDM_RX_3,
	IDX_AFE_PORT_ID_TERTIARY_TDM_TX_3,
	IDX_AFE_PORT_ID_TERTIARY_TDM_RX_4,
	IDX_AFE_PORT_ID_TERTIARY_TDM_TX_4,
	IDX_AFE_PORT_ID_TERTIARY_TDM_RX_5,
	IDX_AFE_PORT_ID_TERTIARY_TDM_TX_5,
	IDX_AFE_PORT_ID_TERTIARY_TDM_RX_6,
	IDX_AFE_PORT_ID_TERTIARY_TDM_TX_6,
	IDX_AFE_PORT_ID_TERTIARY_TDM_RX_7,
	IDX_AFE_PORT_ID_TERTIARY_TDM_TX_7,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_0,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_0,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_1,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_1,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_2,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_2,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_3,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_3,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_4,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_4,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_5,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_5,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_6,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_6,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_7,
	IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_7,
	AFE_MAX_PORTS
};

@@ -248,8 +313,18 @@ void afe_clear_config(enum afe_config_type config);
bool afe_has_config(enum afe_config_type config);

void afe_set_aanc_info(struct aanc_data *aanc_info);
int afe_port_group_set_param(u16 *port_id, int channel_count);
int afe_port_group_enable(u16 enable);
int afe_port_group_set_param(u16 group_id,
	union afe_port_group_config *afe_group_config);
int afe_port_group_enable(u16 group_id,
	union afe_port_group_config *afe_group_config, u16 enable);
int afe_unmap_rtac_block(uint32_t *mem_map_handle);
int afe_map_rtac_block(struct rtac_cal_block_data *cal_block);
int afe_send_slot_mapping_cfg(
	struct afe_param_id_slot_mapping_cfg *slot_mapping_cfg,
	u16 port_id);
int afe_send_custom_tdm_header_cfg(
	struct afe_param_id_custom_tdm_header_cfg *custom_tdm_header_cfg,
	u16 port_id);
int afe_tdm_port_start(u16 port_id, struct afe_tdm_port_config *tdm_port,
		u32 rate);
#endif /* __Q6AFE_V2_H__ */
+1025 −0

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