Loading drivers/power/qpnp-fg.c +24 −5 Original line number Diff line number Diff line Loading @@ -529,6 +529,7 @@ struct fg_chip { bool charge_done; bool resume_soc_lowered; bool vbat_low_irq_enabled; bool full_soc_irq_enabled; bool charge_full; bool hold_soc_while_full; bool input_present; Loading Loading @@ -1332,8 +1333,11 @@ static void fg_enable_irqs(struct fg_chip *chip, bool enable) if (enable) { enable_irq(chip->soc_irq[DELTA_SOC].irq); enable_irq_wake(chip->soc_irq[DELTA_SOC].irq); if (!chip->full_soc_irq_enabled) { enable_irq(chip->soc_irq[FULL_SOC].irq); enable_irq_wake(chip->soc_irq[FULL_SOC].irq); chip->full_soc_irq_enabled = true; } enable_irq(chip->batt_irq[BATT_MISSING].irq); if (!chip->vbat_low_irq_enabled) { enable_irq(chip->batt_irq[VBATT_LOW].irq); Loading @@ -1348,8 +1352,11 @@ static void fg_enable_irqs(struct fg_chip *chip, bool enable) } else { disable_irq_wake(chip->soc_irq[DELTA_SOC].irq); disable_irq_nosync(chip->soc_irq[DELTA_SOC].irq); if (chip->full_soc_irq_enabled) { disable_irq_wake(chip->soc_irq[FULL_SOC].irq); disable_irq_nosync(chip->soc_irq[FULL_SOC].irq); chip->full_soc_irq_enabled = false; } disable_irq(chip->batt_irq[BATT_MISSING].irq); if (chip->vbat_low_irq_enabled) { disable_irq_wake(chip->batt_irq[VBATT_LOW].irq); Loading Loading @@ -3950,6 +3957,13 @@ static void status_change_work(struct work_struct *work) enable_irq_wake(chip->batt_irq[VBATT_LOW].irq); chip->vbat_low_irq_enabled = true; } if (!chip->full_soc_irq_enabled) { enable_irq(chip->soc_irq[FULL_SOC].irq); enable_irq_wake(chip->soc_irq[FULL_SOC].irq); chip->full_soc_irq_enabled = true; } if (!!(chip->wa_flag & PULSE_REQUEST_WA) && capacity == 100) fg_configure_soc(chip); } else if (chip->status == POWER_SUPPLY_STATUS_DISCHARGING) { Loading @@ -3959,6 +3973,12 @@ static void status_change_work(struct work_struct *work) disable_irq_nosync(chip->batt_irq[VBATT_LOW].irq); chip->vbat_low_irq_enabled = false; } if (chip->full_soc_irq_enabled) { disable_irq_wake(chip->soc_irq[FULL_SOC].irq); disable_irq_nosync(chip->soc_irq[FULL_SOC].irq); chip->full_soc_irq_enabled = false; } } fg_cap_learning_check(chip); schedule_work(&chip->update_esr_work); Loading Loading @@ -7194,7 +7214,6 @@ static int fg_init_irqs(struct fg_chip *chip) } enable_irq_wake(chip->soc_irq[DELTA_SOC].irq); enable_irq_wake(chip->soc_irq[FULL_SOC].irq); if (!chip->use_vbat_low_empty_soc) enable_irq_wake(chip->soc_irq[EMPTY_SOC].irq); break; Loading Loading
drivers/power/qpnp-fg.c +24 −5 Original line number Diff line number Diff line Loading @@ -529,6 +529,7 @@ struct fg_chip { bool charge_done; bool resume_soc_lowered; bool vbat_low_irq_enabled; bool full_soc_irq_enabled; bool charge_full; bool hold_soc_while_full; bool input_present; Loading Loading @@ -1332,8 +1333,11 @@ static void fg_enable_irqs(struct fg_chip *chip, bool enable) if (enable) { enable_irq(chip->soc_irq[DELTA_SOC].irq); enable_irq_wake(chip->soc_irq[DELTA_SOC].irq); if (!chip->full_soc_irq_enabled) { enable_irq(chip->soc_irq[FULL_SOC].irq); enable_irq_wake(chip->soc_irq[FULL_SOC].irq); chip->full_soc_irq_enabled = true; } enable_irq(chip->batt_irq[BATT_MISSING].irq); if (!chip->vbat_low_irq_enabled) { enable_irq(chip->batt_irq[VBATT_LOW].irq); Loading @@ -1348,8 +1352,11 @@ static void fg_enable_irqs(struct fg_chip *chip, bool enable) } else { disable_irq_wake(chip->soc_irq[DELTA_SOC].irq); disable_irq_nosync(chip->soc_irq[DELTA_SOC].irq); if (chip->full_soc_irq_enabled) { disable_irq_wake(chip->soc_irq[FULL_SOC].irq); disable_irq_nosync(chip->soc_irq[FULL_SOC].irq); chip->full_soc_irq_enabled = false; } disable_irq(chip->batt_irq[BATT_MISSING].irq); if (chip->vbat_low_irq_enabled) { disable_irq_wake(chip->batt_irq[VBATT_LOW].irq); Loading Loading @@ -3950,6 +3957,13 @@ static void status_change_work(struct work_struct *work) enable_irq_wake(chip->batt_irq[VBATT_LOW].irq); chip->vbat_low_irq_enabled = true; } if (!chip->full_soc_irq_enabled) { enable_irq(chip->soc_irq[FULL_SOC].irq); enable_irq_wake(chip->soc_irq[FULL_SOC].irq); chip->full_soc_irq_enabled = true; } if (!!(chip->wa_flag & PULSE_REQUEST_WA) && capacity == 100) fg_configure_soc(chip); } else if (chip->status == POWER_SUPPLY_STATUS_DISCHARGING) { Loading @@ -3959,6 +3973,12 @@ static void status_change_work(struct work_struct *work) disable_irq_nosync(chip->batt_irq[VBATT_LOW].irq); chip->vbat_low_irq_enabled = false; } if (chip->full_soc_irq_enabled) { disable_irq_wake(chip->soc_irq[FULL_SOC].irq); disable_irq_nosync(chip->soc_irq[FULL_SOC].irq); chip->full_soc_irq_enabled = false; } } fg_cap_learning_check(chip); schedule_work(&chip->update_esr_work); Loading Loading @@ -7194,7 +7214,6 @@ static int fg_init_irqs(struct fg_chip *chip) } enable_irq_wake(chip->soc_irq[DELTA_SOC].irq); enable_irq_wake(chip->soc_irq[FULL_SOC].irq); if (!chip->use_vbat_low_empty_soc) enable_irq_wake(chip->soc_irq[EMPTY_SOC].irq); break; Loading