Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6 (63734642) · Commits · e / devices / android_kernel_xiaomi_markw

Documentation/DocBook/mac80211.tmpl

+1 −1

Original line number	Diff line number	Diff line
		@@ -144,7 +144,7 @@ usage should require reading the full document.
		this though and the recommendation to allow only a single
		interface in STA mode at first!
		</para>
		!Finclude/net/mac80211.h ieee80211_if_init_conf
		!Finclude/net/mac80211.h ieee80211_vif
		</chapter>

		<chapter id="rx-tx">

drivers/net/wireless/ath/ath5k/ath5k.h

+6 −18

Original line number	Diff line number	Diff line
		@@ -1063,6 +1063,7 @@ struct ath5k_hw {
		u32 ah_cw_min;
		u32 ah_cw_max;
		u32 ah_limit_tx_retries;
		u8 ah_coverage_class;

		/* Antenna Control */
		u32 ah_ant_ctl[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX];
		@@ -1200,6 +1201,7 @@ extern bool ath5k_eeprom_is_hb63(struct ath5k_hw *ah);

		/* Protocol Control Unit Functions */
		extern int ath5k_hw_set_opmode(struct ath5k_hw *ah);
		extern void ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class);
		/* BSSID Functions */
		extern int ath5k_hw_set_lladdr(struct ath5k_hw ah, const u8 mac);
		extern void ath5k_hw_set_associd(struct ath5k_hw *ah);
		@@ -1231,6 +1233,10 @@ extern int ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout);
		extern unsigned int ath5k_hw_get_ack_timeout(struct ath5k_hw *ah);
		extern int ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout);
		extern unsigned int ath5k_hw_get_cts_timeout(struct ath5k_hw *ah);
		/* Clock rate related functions */
		unsigned int ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec);
		unsigned int ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock);
		unsigned int ath5k_hw_get_clockrate(struct ath5k_hw *ah);
		/* Key table (WEP) functions */
		extern int ath5k_hw_reset_key(struct ath5k_hw *ah, u16 entry);
		extern int ath5k_hw_is_key_valid(struct ath5k_hw *ah, u16 entry);
		@@ -1310,24 +1316,6 @@ extern int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower);
		* Functions used internaly
		*/

		/*
		* Translate usec to hw clock units
		* TODO: Half/quarter rate
		*/
		static inline unsigned int ath5k_hw_htoclock(unsigned int usec, bool turbo)
		{
		return turbo ? (usec * 80) : (usec * 40);
		}

		/*
		* Translate hw clock units to usec
		* TODO: Half/quarter rate
		*/
		static inline unsigned int ath5k_hw_clocktoh(unsigned int clock, bool turbo)
		{
		return turbo ? (clock / 80) : (clock / 40);
		}

		static inline struct ath_common ath5k_hw_common(struct ath5k_hw ah)
		{
		return &ah->common;

drivers/net/wireless/ath/ath5k/base.c

+22 −0

Original line number	Diff line number	Diff line
		@@ -254,6 +254,8 @@ static void ath5k_bss_info_changed(struct ieee80211_hw *hw,
		u32 changes);
		static void ath5k_sw_scan_start(struct ieee80211_hw *hw);
		static void ath5k_sw_scan_complete(struct ieee80211_hw *hw);
		static void ath5k_set_coverage_class(struct ieee80211_hw *hw,
		u8 coverage_class);

		static const struct ieee80211_ops ath5k_hw_ops = {
		.tx = ath5k_tx,
		@@ -274,6 +276,7 @@ static const struct ieee80211_ops ath5k_hw_ops = {
		.bss_info_changed = ath5k_bss_info_changed,
		.sw_scan_start = ath5k_sw_scan_start,
		.sw_scan_complete = ath5k_sw_scan_complete,
		.set_coverage_class = ath5k_set_coverage_class,
		};

		/*
		@@ -3262,3 +3265,22 @@ static void ath5k_sw_scan_complete(struct ieee80211_hw *hw)
		ath5k_hw_set_ledstate(sc->ah, sc->assoc ?
		AR5K_LED_ASSOC : AR5K_LED_INIT);
		}

		/**
		* ath5k_set_coverage_class - Set IEEE 802.11 coverage class
		*
		* @hw: struct ieee80211_hw pointer
		* @coverage_class: IEEE 802.11 coverage class number
		*
		* Mac80211 callback. Sets slot time, ACK timeout and CTS timeout for given
		* coverage class. The values are persistent, they are restored after device
		* reset.
		*/
		static void ath5k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
		{
		struct ath5k_softc *sc = hw->priv;

		mutex_lock(&sc->lock);
		ath5k_hw_set_coverage_class(sc->ah, coverage_class);
		mutex_unlock(&sc->lock);
		}

drivers/net/wireless/ath/ath5k/eeprom.c

+29 −3

Original line number	Diff line number	Diff line
		@@ -97,7 +97,7 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
		struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
		int ret;
		u16 val;
		u32 cksum, offset;
		u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX;

		/*
		* Read values from EEPROM and store them in the capability structure
		@@ -116,12 +116,38 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
		* Validate the checksum of the EEPROM date. There are some
		* devices with invalid EEPROMs.
		*/
		for (cksum = 0, offset = 0; offset < AR5K_EEPROM_INFO_MAX; offset++) {
		AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_UPPER, val);
		if (val) {
		eep_max = (val & AR5K_EEPROM_SIZE_UPPER_MASK) <<
		AR5K_EEPROM_SIZE_ENDLOC_SHIFT;
		AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_LOWER, val);
		eep_max = (eep_max \| val) - AR5K_EEPROM_INFO_BASE;

		/*
		* Fail safe check to prevent stupid loops due
		* to busted EEPROMs. XXX: This value is likely too
		* big still, waiting on a better value.
		*/
		if (eep_max > (3 * AR5K_EEPROM_INFO_MAX)) {
		ATH5K_ERR(ah->ah_sc, "Invalid max custom EEPROM size: "
		"%d (0x%04x) max expected: %d (0x%04x)\n",
		eep_max, eep_max,
		3 * AR5K_EEPROM_INFO_MAX,
		3 * AR5K_EEPROM_INFO_MAX);
		return -EIO;
		}
		}

		for (cksum = 0, offset = 0; offset < eep_max; offset++) {
		AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val);
		cksum ^= val;
		}
		if (cksum != AR5K_EEPROM_INFO_CKSUM) {
		ATH5K_ERR(ah->ah_sc, "Invalid EEPROM checksum 0x%04x\n", cksum);
		ATH5K_ERR(ah->ah_sc, "Invalid EEPROM "
		"checksum: 0x%04x eep_max: 0x%04x (%s)\n",
		cksum, eep_max,
		eep_max == AR5K_EEPROM_INFO_MAX ?
		"default size" : "custom size");
		return -EIO;
		}

drivers/net/wireless/ath/ath5k/eeprom.h

+8 −0

Original line number	Diff line number	Diff line
		@@ -37,6 +37,14 @@
		#define AR5K_EEPROM_RFKILL_POLARITY_S 1

		#define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */

		/* FLASH(EEPROM) Defines for AR531X chips */
		#define AR5K_EEPROM_SIZE_LOWER 0x1b /* size info -- lower */
		#define AR5K_EEPROM_SIZE_UPPER 0x1c /* size info -- upper */
		#define AR5K_EEPROM_SIZE_UPPER_MASK 0xfff0
		#define AR5K_EEPROM_SIZE_UPPER_SHIFT 4
		#define AR5K_EEPROM_SIZE_ENDLOC_SHIFT 12

		#define AR5K_EEPROM_CHECKSUM 0x00c0 /* EEPROM checksum */
		#define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */
		#define AR5K_EEPROM_INFO_MAX (0x400 - AR5K_EEPROM_INFO_BASE)