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Commit 635f0258 authored by Russell King's avatar Russell King Committed by Russell King
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[ARM] clps7500: remove support



The CLPS7500 platform has not built since 2.6.22-git7 and there
seems to be no interest in fixing it.  So, remove the platform
support.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent ed313489
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+0 −9
Original line number Diff line number Diff line
@@ -243,15 +243,6 @@ config ARCH_AT91
	  This enables support for systems based on the Atmel AT91RM9200,
	  AT91SAM9 and AT91CAP9 processors.

config ARCH_CLPS7500
	bool "Cirrus CL-PS7500FE"
	select TIMER_ACORN
	select ISA
	select NO_IOPORT
	select ARCH_SPARSEMEM_ENABLE
	help
	  Support for the Cirrus Logic PS7500FE system-on-a-chip.

config ARCH_CLPS711X
	bool "Cirrus Logic CLPS711x/EP721x-based"
	help
+0 −1
Original line number Diff line number Diff line
@@ -96,7 +96,6 @@ textofs-y := 0x00008000

 machine-$(CONFIG_ARCH_RPC)	   := rpc
 machine-$(CONFIG_ARCH_EBSA110)	   := ebsa110
 machine-$(CONFIG_ARCH_CLPS7500)   := clps7500
 machine-$(CONFIG_FOOTBRIDGE)	   := footbridge
 machine-$(CONFIG_ARCH_SHARK)	   := shark
 machine-$(CONFIG_ARCH_SA1100)	   := sa1100
+0 −4
Original line number Diff line number Diff line
@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y)
OBJS		+= head-l7200.o
endif

ifeq ($(CONFIG_ARCH_CLPS7500),y)
HEAD		= head-clps7500.o
endif

ifeq ($(CONFIG_ARCH_P720T),y)
# Borrow this code from SA1100
OBJS		+= head-sa1100.o
+0 −86
Original line number Diff line number Diff line
/*
 * linux/arch/arm/boot/compressed/head-clps7500.S
 *
 * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
 */


		/* There are three different ways the kernel can be
		   booted on a 7500 system: from Angel (loaded in RAM), from
		   16-bit ROM or from 32-bit Flash.  Luckily, a single kernel
		   image does for them all. */
		/* This branch is taken if the CPU memory width matches the
		   actual device in use.  The default at power on is 16 bits
		   so we must be prepared for a mismatch. */
		.section ".start", "ax"
2:
		b	1f
		.word	0xffff
		.word	0xb632		@ mov r11, #0x03200000
		.word	0xe3a0
		.word	0x0000		@ mov r0, #0
		.word	0xe3a0
		.word	0x0080		@ strb r0, [r11, #0x80]
		.word	0xe5cb
		.word	0xf000		@ mov pc, #0
		.word	0xe3a0
1:
		adr	r1, 2b
		teq	r1, #0
		bne	.Langel
		/* This is a direct-from-ROM boot.  Copy the kernel into 
		   RAM and run it there. */
		mov	r0, #0x30
		mcr	p15, 0, r0, c1, c0, 0
		mov	r0, #0x13
		msr	cpsr_cxsf, r0
		mov	r12, #0x03000000	@ point to LEDs
		orr	r12, r12, #0x00020000
		orr	r12, r12, #0xba00
		mov	r0, #0x5500
		str	r0, [r12]
		mov	r0, #0x10000000
		orr	r0, r0, #0x8000
		mov	r4, r0
		ldr	r2, =_end
2:
		ldr	r3, [r1], #4
		str	r3, [r0], #4
		teq	r0, r2
		bne	2b
		mov	r0, #0xff00
		str	r0, [r12]
1:	
		mov	r12, #0x03000000	@ point to LEDs
		orr	r12, r12, #0x00020000
		orr	r12, r12, #0xba00
		mov	r0, #0xfe00
		str	r0, [r12]

		adr	lr, 1f
		mov	r0, #0
		mov	r1, #14		/* MACH_TYPE_CLPS7500 */
		mov	pc, lr
.Langel:
#ifdef CONFIG_ANGELBOOT
		/* Call Angel to switch into SVC mode. */
		mov	r0, #0x17
		swi	0x123456
#endif
		/* Ensure all interrupts are off and MMU disabled */
		mrs	r0, cpsr
		orr	r0, r0, #0xc0
		msr	cpsr_cxsf, r0

		adr	lr, 1b
		orr	lr, lr, #0x10000000
		mov	r0, #0x30		@ MMU off
		mcr	p15, 0, r0, c1, c0, 0
		mov	r0, r0
	 	mov	pc, lr

		.ltorg

1:
/* And the rest */
#include "head.S"
+0 −41
Original line number Diff line number Diff line
@@ -32,19 +32,11 @@
#define IOMD_KARTRX	(0x004)
#define IOMD_KCTRL	(0x008)

#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_IOLINES	(0x00C)
#endif

#define IOMD_IRQSTATA	(0x010)
#define IOMD_IRQREQA	(0x014)
#define IOMD_IRQCLRA	(0x014)
#define IOMD_IRQMASKA	(0x018)

#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_SUSMODE	(0x01C)
#endif

#define IOMD_IRQSTATB	(0x020)
#define IOMD_IRQREQB	(0x024)
#define IOMD_IRQMASKB	(0x028)
@@ -53,10 +45,6 @@
#define IOMD_FIQREQ	(0x034)
#define IOMD_FIQMASK	(0x038)

#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_CLKCTL	(0x03C)
#endif

#define IOMD_T0CNTL	(0x040)
#define IOMD_T0LTCHL	(0x040)
#define IOMD_T0CNTH	(0x044)
@@ -71,18 +59,6 @@
#define IOMD_T1GO	(0x058)
#define IOMD_T1LATCH	(0x05c)

#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_IRQSTATC	(0x060)
#define IOMD_IRQREQC	(0x064)
#define IOMD_IRQMASKC	(0x068)

#define IOMD_VIDMUX	(0x06c)

#define IOMD_IRQSTATD	(0x070)
#define IOMD_IRQREQD	(0x074)
#define IOMD_IRQMASKD	(0x078)
#endif

#define IOMD_ROMCR0	(0x080)
#define IOMD_ROMCR1	(0x084)
#ifdef CONFIG_ARCH_RPC
@@ -100,11 +76,6 @@
#define IOMD_MOUSEY	(0x0A4)
#endif

#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_MSEDAT	(0x0A8)
#define IOMD_MSECTL	(0x0Ac)
#endif

#ifdef CONFIG_ARCH_RPC
#define IOMD_DMATCR	(0x0C0)
#endif
@@ -113,18 +84,6 @@
#ifdef CONFIG_ARCH_RPC
#define IOMD_DMAEXT	(0x0CC)
#endif
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_ASTCR	(0x0CC)
#define IOMD_DRAMCR	(0x0D0)
#define IOMD_SELFREF	(0x0D4)
#define IOMD_ATODICR	(0x0E0)
#define IOMD_ATODSR	(0x0E4)
#define IOMD_ATODCC	(0x0E8)
#define IOMD_ATODCNT1	(0x0EC)
#define IOMD_ATODCNT2	(0x0F0)
#define IOMD_ATODCNT3	(0x0F4)
#define IOMD_ATODCNT4	(0x0F8)
#endif

#ifdef CONFIG_ARCH_RPC
#define DMA_EXT_IO0	1
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