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Commit 635ad4a3 authored by Archana Sathyakumar's avatar Archana Sathyakumar Committed by Matt Wagantall
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irq-gic-v3: Disable group pending interrupts before hotplug 



Collapsing the cpu with ICC_GRPEN1_EL1 puts GIC in a unknown state where
the cpu might not see the interrupts pending at the redistributor on
its wakeup.

Clear this register on the collapse path.

Change-Id: I5d3a71846feb1a79d091f6adbf4ad39fa9328479
Signed-off-by: default avatarArchana Sathyakumar <asathyak@codeaurora.org>
parent 2e2127b2

drivers/irqchip/irq-gic-v3.c

+11 −3
Original line number Diff line number Diff line
@@ -420,8 +420,17 @@ static int gic_peek_irq(struct irq_data *d, u32 offset) 
static int gic_secondary_init(struct notifier_block *nfb,

			unsigned long action, void *hcpu)

{

	if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)

	switch (action) {

	case CPU_STARTING:

	case CPU_STARTING_FROZEN:

		gic_cpu_init();

		break;

	case CPU_DYING:

	case CPU_DYING_FROZEN:

		gic_write_grpen1(0);

		break;

	}



	return NOTIFY_OK;

}
@@ -716,7 +725,6 @@ static int __init gic_of_init(struct device_node *node, struct device_node *pare 
	gic_dist_init();

	gic_cpu_init();

	gic_cpu_pm_init();



	return 0;



out_free: