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Commit 6340211c authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville
Browse files

ath5k: disable 32KHz sleep clock operation by default 



While 32 KHz sleep clock might provide some power saving benefits,
it is also a major source of stability issues, on OpenWrt it produced
some reproducible data bus errors on register accesses on several
different MIPS platforms.

All the Atheros drivers that I can find do not enable this feature,
so it makes sense to leave it disabled in ath5k as well.

Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Acked-by: default avatarNick Kossifidis <mickflemm@gmail.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent f0064388

drivers/net/wireless/ath/ath5k/ath5k.h

+2 −0
Original line number Diff line number Diff line
@@ -1067,6 +1067,8 @@ struct ath5k_hw { 
	u8			ah_retry_long;

	u8			ah_retry_short;



	u32			ah_use_32khz_clock;



	u8			ah_coverage_class;

	bool			ah_ack_bitrate_high;

	u8			ah_bwmode;

drivers/net/wireless/ath/ath5k/debug.c

+3 −0
Original line number Diff line number Diff line
@@ -922,6 +922,9 @@ ath5k_debug_init_device(struct ath5k_softc *sc) 


	debugfs_create_file("queue", S_IWUSR | S_IRUSR, phydir, sc,

			    &fops_queue);



	debugfs_create_bool("32khz_clock", S_IWUSR | S_IRUSR, phydir,

			    &sc->ah->ah_use_32khz_clock);

}



/* functions used in other places */

drivers/net/wireless/ath/ath5k/reset.c

+8 −3
Original line number Diff line number Diff line
@@ -1287,11 +1287,16 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, 
	ath5k_hw_dma_init(ah);





	/* Enable 32KHz clock function for AR5212+ chips

	/*

	 * Enable 32KHz clock function for AR5212+ chips

	 * Set clocks to 32KHz operation and use an

	 * external 32KHz crystal when sleeping if one

	 * exists */

	if (ah->ah_version == AR5K_AR5212 &&

	 * exists.

	 * Disabled by default because it is also disabled in

	 * other drivers and it is known to cause stability

	 * issues on some devices

	 */

	if (ah->ah_use_32khz_clock && ah->ah_version == AR5K_AR5212 &&

	    op_mode != NL80211_IFTYPE_AP)

		ath5k_hw_set_sleep_clock(ah, true);