Loading arch/arm/boot/dts/qcom/msm8909-pm8909-pm.dtsi +1 −4 Original line number Diff line number Diff line Loading @@ -469,11 +469,8 @@ qcom,tz-flushes-cache; }; qcom,cpu-sleep-status@b088008{ qcom,cpu-sleep-status { compatible = "qcom,cpu-sleep-status"; reg = <0xb088008 0x100>; qcom,cpu-alias-addr = <0x10000>; qcom,sleep-status-mask= <0x80000>; }; qcom,rpm-log@29dc00 { Loading arch/arm/boot/dts/qcom/msm8909-pm8916-pm.dtsi +1 −4 Original line number Diff line number Diff line Loading @@ -477,11 +477,8 @@ qcom,synced-clocks; }; qcom,cpu-sleep-status@b088008{ qcom,cpu-sleep-status { compatible = "qcom,cpu-sleep-status"; reg = <0xb088008 0x100>; qcom,cpu-alias-addr = <0x10000>; qcom,sleep-status-mask= <0x80000>; }; qcom,rpm-log@29dc00 { Loading arch/arm/boot/dts/qcom/msm8909.dtsi +24 −1 Original line number Diff line number Diff line Loading @@ -75,6 +75,7 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x0>; qcom,sleep-status = <&cpu0_slp_sts>; qcom,limits-info = <&mitigation_profile0>; }; Loading @@ -82,6 +83,7 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x1>; qcom,sleep-status = <&cpu1_slp_sts>; qcom,limits-info = <&mitigation_profile2>; }; Loading @@ -89,6 +91,7 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x2>; qcom,sleep-status = <&cpu2_slp_sts>; qcom,limits-info = <&mitigation_profile1>; }; Loading @@ -96,6 +99,7 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x3>; qcom,sleep-status = <&cpu3_slp_sts>; qcom,limits-info = <&mitigation_profile2>; }; }; Loading Loading @@ -1681,8 +1685,27 @@ "iface_clk", "bus_clk"; qcom,ce-opp-freq = <100000000>; }; cpu0_slp_sts: cpu-sleep-status@b088008 { reg = <0xb088008 0x100>; qcom,sleep-status-mask= <0x80000>; }; cpu1_slp_sts: cpu-sleep-status@b098008 { reg = <0xb098008 0x100>; qcom,sleep-status-mask= <0x80000>; }; cpu2_slp_sts: cpu-sleep-status@b0a8008 { reg = <0xb0a8008 0x100>; qcom,sleep-status-mask= <0x80000>; }; cpu3_slp_sts: cpu-sleep-status@b0b8008 { reg = <0xb0b8008 0x100>; qcom,sleep-status-mask= <0x80000>; }; }; &gdsc_mdss { clock-names = "core_clk", "bus_clk"; clocks = <&clock_gcc clk_gcc_mdss_mdp_clk>, Loading Loading
arch/arm/boot/dts/qcom/msm8909-pm8909-pm.dtsi +1 −4 Original line number Diff line number Diff line Loading @@ -469,11 +469,8 @@ qcom,tz-flushes-cache; }; qcom,cpu-sleep-status@b088008{ qcom,cpu-sleep-status { compatible = "qcom,cpu-sleep-status"; reg = <0xb088008 0x100>; qcom,cpu-alias-addr = <0x10000>; qcom,sleep-status-mask= <0x80000>; }; qcom,rpm-log@29dc00 { Loading
arch/arm/boot/dts/qcom/msm8909-pm8916-pm.dtsi +1 −4 Original line number Diff line number Diff line Loading @@ -477,11 +477,8 @@ qcom,synced-clocks; }; qcom,cpu-sleep-status@b088008{ qcom,cpu-sleep-status { compatible = "qcom,cpu-sleep-status"; reg = <0xb088008 0x100>; qcom,cpu-alias-addr = <0x10000>; qcom,sleep-status-mask= <0x80000>; }; qcom,rpm-log@29dc00 { Loading
arch/arm/boot/dts/qcom/msm8909.dtsi +24 −1 Original line number Diff line number Diff line Loading @@ -75,6 +75,7 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x0>; qcom,sleep-status = <&cpu0_slp_sts>; qcom,limits-info = <&mitigation_profile0>; }; Loading @@ -82,6 +83,7 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x1>; qcom,sleep-status = <&cpu1_slp_sts>; qcom,limits-info = <&mitigation_profile2>; }; Loading @@ -89,6 +91,7 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x2>; qcom,sleep-status = <&cpu2_slp_sts>; qcom,limits-info = <&mitigation_profile1>; }; Loading @@ -96,6 +99,7 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x3>; qcom,sleep-status = <&cpu3_slp_sts>; qcom,limits-info = <&mitigation_profile2>; }; }; Loading Loading @@ -1681,8 +1685,27 @@ "iface_clk", "bus_clk"; qcom,ce-opp-freq = <100000000>; }; cpu0_slp_sts: cpu-sleep-status@b088008 { reg = <0xb088008 0x100>; qcom,sleep-status-mask= <0x80000>; }; cpu1_slp_sts: cpu-sleep-status@b098008 { reg = <0xb098008 0x100>; qcom,sleep-status-mask= <0x80000>; }; cpu2_slp_sts: cpu-sleep-status@b0a8008 { reg = <0xb0a8008 0x100>; qcom,sleep-status-mask= <0x80000>; }; cpu3_slp_sts: cpu-sleep-status@b0b8008 { reg = <0xb0b8008 0x100>; qcom,sleep-status-mask= <0x80000>; }; }; &gdsc_mdss { clock-names = "core_clk", "bus_clk"; clocks = <&clock_gcc clk_gcc_mdss_mdp_clk>, Loading