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Commit 61db7fb1 authored by Paul Walmsley's avatar Paul Walmsley Committed by Russell King
Browse files

[ARM] 5192/1: ARM TLB: add v7wbi_{possible,always}_flags to {possible,always}_tlb_flags 



Commit 2ccdd1e7 doesn't add
v7wbi_possible_flags and v7wbi_always_flags to possible_tlb_flags and
always_tlb_flags.  This causes the L2 cache flush in clean_pmd_entry()
(intended for Feroceon only) to execute on ARMv7, and the CPU hangs.

This patch is required for OMAP3 boards to boot.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Acked-by: default avatarLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 751a8ae9

arch/arm/include/asm/tlbflush.h

+5 −2
Original line number Diff line number Diff line
@@ -54,6 +54,7 @@ 
 *	  v4wbi - ARMv4 with write buffer with I TLB flush entry instruction

 *	  fr    - Feroceon (v4wbi with non-outer-cacheable page table walks)

 *	  v6wbi - ARMv6 with write buffer with I TLB flush entry instruction

 *	  v7wbi - identical to v6wbi

 */

#undef _TLB

#undef MULTI_TLB
@@ -266,14 +267,16 @@ extern struct cpu_tlb_fns cpu_tlb; 
				 v4wbi_possible_flags | \

				 fr_possible_flags | \

				 v4wb_possible_flags | \

				 v6wbi_possible_flags)

				 v6wbi_possible_flags | \

				 v7wbi_possible_flags)



#define always_tlb_flags	(v3_always_flags & \

				 v4_always_flags & \

				 v4wbi_always_flags & \

				 fr_always_flags & \

				 v4wb_always_flags & \

				 v6wbi_always_flags)

				 v6wbi_always_flags & \

				 v7wbi_always_flags)



#define tlb_flag(f)	((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f)))