Loading arch/arm/kernel/smp.c +2 −2 Original line number Diff line number Diff line Loading @@ -363,12 +363,12 @@ asmlinkage void secondary_start_kernel(void) if (smp_ops.smp_secondary_init) smp_ops.smp_secondary_init(cpu); smp_store_cpu_info(cpu); notify_cpu_starting(cpu); calibrate_delay(); smp_store_cpu_info(cpu); /* * OK, now it's safe to let the boot CPU continue. Wait for * the CPU migration code to notice that the CPU is online Loading arch/arm64/kernel/smp.c +2 −2 Original line number Diff line number Diff line Loading @@ -171,10 +171,10 @@ asmlinkage void secondary_start_kernel(void) /* * Enable GIC and timers. */ notify_cpu_starting(cpu); smp_store_cpu_info(cpu); notify_cpu_starting(cpu); /* * OK, now it's safe to let the boot CPU continue. Wait for * the CPU migration code to notice that the CPU is online Loading Loading
arch/arm/kernel/smp.c +2 −2 Original line number Diff line number Diff line Loading @@ -363,12 +363,12 @@ asmlinkage void secondary_start_kernel(void) if (smp_ops.smp_secondary_init) smp_ops.smp_secondary_init(cpu); smp_store_cpu_info(cpu); notify_cpu_starting(cpu); calibrate_delay(); smp_store_cpu_info(cpu); /* * OK, now it's safe to let the boot CPU continue. Wait for * the CPU migration code to notice that the CPU is online Loading
arch/arm64/kernel/smp.c +2 −2 Original line number Diff line number Diff line Loading @@ -171,10 +171,10 @@ asmlinkage void secondary_start_kernel(void) /* * Enable GIC and timers. */ notify_cpu_starting(cpu); smp_store_cpu_info(cpu); notify_cpu_starting(cpu); /* * OK, now it's safe to let the boot CPU continue. Wait for * the CPU migration code to notice that the CPU is online Loading