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Commit 6152caca authored by Deepak Katragadda's avatar Deepak Katragadda
Browse files

clk: msm: clock: Add graphics clocks support for msm8996 Lite 



The graphics clock frequencies need to be updated for
msm8996 Lite. Add support for doing the same using the
bin fuse value.

Change-Id: If85a0045db889250c8d17a67c655dc83488cd840
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 91cab8ef

Documentation/devicetree/bindings/arm/msm/clock-controller.txt

+7 −0
Original line number Original line Diff line number Diff line
@@ -84,6 +84,13 @@ Optional properties: 
			    operate at. Drivers can use the OPP library API to

			    operate at. Drivers can use the OPP library API to

			    operate on the list of OPPs registered using these

			    operate on the list of OPPs registered using these

			    values.

			    values.

- qcom,<clk>-speedbinX: A table of frequency (Hz) to voltage (corner) mapping

			that represents the max frequency possible for each

			supported voltage level for the clock.

			'X' is the speed bin into which the device falls into -

			a bin will have unique frequency-voltage relationships.

			The value 'X' is read from efuse registers, and the right

			table is picked from multiple possible tables.

- qcom,<clock-name>-opp-handle: phandle references to the devices for which OPP

- qcom,<clock-name>-opp-handle: phandle references to the devices for which OPP

			table is filled with the clock frequency and voltage

			table is filled with the clock frequency and voltage

			values.

			values.

arch/arm/boot/dts/qcom/msm8996-v2.dtsi

+2 −2
Original line number Original line Diff line number Diff line
@@ -40,14 +40,14 @@ 
&clock_gpu {

&clock_gpu {

	compatible = "qcom,gpucc-8996-v2";

	compatible = "qcom,gpucc-8996-v2";

	qcom,gfx3d_clk_src_v2-opp-handle = <&msm_gpu>;

	qcom,gfx3d_clk_src_v2-opp-handle = <&msm_gpu>;

	qcom,gfxfreq-corner-v2 =

	qcom,gfxfreq-speedbin0 =

		<	   0  0  0 >,

		<	   0  0  0 >,

		<  125000000  3  4 >,

		<  125000000  3  4 >,

		<  210000000  3  4 >,

		<  210000000  3  4 >,

		<  300000000  3  4 >,

		<  300000000  3  4 >,

		<  500000000  4  5 >,

		<  500000000  4  5 >,

		<  604800000  5  7 >;

		<  604800000  5  7 >;

	qcom,gpufreq-mx-corner-v2=

	qcom,gfxfreq-mx-speedbin0 =

		<	   0  0 >,

		<	   0  0 >,

		<  125000000  4 >,

		<  125000000  4 >,

		<  210000000  4 >,

		<  210000000  4 >,

arch/arm/boot/dts/qcom/msm8996-v3.0.dtsi

+1 −1
Original line number Original line Diff line number Diff line
@@ -109,7 +109,7 @@ 
&clock_gpu {

&clock_gpu {

	compatible = "qcom,gpucc-8996-v3.0";

	compatible = "qcom,gpucc-8996-v3.0";

	qcom,gfx3d_clk_src_v2-opp-handle = <&msm_gpu>;

	qcom,gfx3d_clk_src_v2-opp-handle = <&msm_gpu>;

	qcom,gfxfreq-corner-v2 =

	qcom,gfxfreq-speedbin0 =

		<	   0  0  0 >,

		<	   0  0  0 >,

		<  133000000  3  4 >,

		<  133000000  3  4 >,

		<  214000000  3  4 >,

		<  214000000  3  4 >,

arch/arm/boot/dts/qcom/msm8996-v3.dtsi

+17 −2
Original line number Original line Diff line number Diff line
@@ -40,7 +40,7 @@ 
&clock_gpu {

&clock_gpu {

	compatible = "qcom,gpucc-8996-v3";

	compatible = "qcom,gpucc-8996-v3";

	qcom,gfx3d_clk_src_v2-opp-handle = <&msm_gpu>;

	qcom,gfx3d_clk_src_v2-opp-handle = <&msm_gpu>;

	qcom,gfxfreq-corner-v2 =

	qcom,gfxfreq-speedbin0 =

		<	   0  0  0 >,

		<	   0  0  0 >,

		<  133000000  2  4 >,

		<  133000000  2  4 >,

		<  214000000  3  4 >,

		<  214000000  3  4 >,
@@ -49,7 +49,7 @@ 
		<  510000000  6  5 >,

		<  510000000  6  5 >,

		<  560000000  7  7 >,

		<  560000000  7  7 >,

		<  624000000  8  7 >;

		<  624000000  8  7 >;

	qcom,gpufreq-mx-corner-v2 =

	qcom,gfxfreq-mx-speedbin0 =

		<	   0  0 >,

		<	   0  0 >,

		<  133000000  4 >,

		<  133000000  4 >,

		<  214000000  4 >,

		<  214000000  4 >,
@@ -58,6 +58,21 @@ 
		<  510000000  5 >,

		<  510000000  5 >,

		<  560000000  7 >,

		<  560000000  7 >,

		<  624000000  7 >;

		<  624000000  7 >;



	qcom,gfxfreq-speedbin1 =

		<	   0  0  0 >,

		<  133000000  2  4 >,

		<  214000000  3  4 >,

		<  315000000  4  4 >,

		<  401800000  5  5 >,

		<  510000000  6  5 >;

	qcom,gfxfreq-mx-speedbin1 =

		<	   0  0 >,

		<  133000000  4 >,

		<  214000000  4 >,

		<  315000000  4 >,

		<  401800000  5 >,

		<  510000000  5 >;

};

};





&gdsc_gpu_gx {

&gdsc_gpu_gx {

arch/arm/boot/dts/qcom/msm8996.dtsi

+5 −4
Original line number Original line Diff line number Diff line
@@ -731,13 +731,14 @@ 




	clock_gpu: qcom,gpucc@8c0000 {

	clock_gpu: qcom,gpucc@8c0000 {

		compatible = "qcom,gpucc-8996";

		compatible = "qcom,gpucc-8996";

		reg = <0x8c0000 0xb00c>;

		reg = <0x8c0000 0xb00c>,

		reg-names = "cc_base";

			<0x74130 0x8>;

		reg-names = "cc_base", "efuse";

		vdd_gfx-supply = <&gfx_vreg>;

		vdd_gfx-supply = <&gfx_vreg>;

		qcom,gfx3d_clk_src-opp-handle = <&msm_gpu>;

		qcom,gfx3d_clk_src-opp-handle = <&msm_gpu>;

		vdd_mx-supply = <&pm8994_s2_corner>;

		vdd_mx-supply = <&pm8994_s2_corner>;

		vdd_gpu_mx-supply = <&pm8994_s2_corner>;

		vdd_gpu_mx-supply = <&pm8994_s2_corner>;

		qcom,gfxfreq-corner-v0 =

		qcom,gfxfreq-speedbin0 =

			<	   0  0  0 >,

			<	   0  0  0 >,

			<   19200000  3  4 >,

			<   19200000  3  4 >,

			<   60000000  3  4 >,

			<   60000000  3  4 >,
@@ -745,7 +746,7 @@ 
			<  205000000  3  4 >,

			<  205000000  3  4 >,

			<  360000000  4  5 >,

			<  360000000  4  5 >,

			<  480000000  5  7 >;

			<  480000000  5  7 >;

		qcom,gpufreq-mx-corner-v0 =

		qcom,gfxfreq-mx-speedbin0 =

			<	   0  0 >,

			<	   0  0 >,

			<   19200000  4 >,

			<   19200000  4 >,

			<   60000000  4 >,

			<   60000000  4 >,