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Commit 5f097cd2 authored by Linus Torvalds's avatar Linus Torvalds
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Pull fbdev update from Jean-Christophe PLAGNIOL-VILLARD:
 "Various fbdev changes for 3.11
   - xilinxfb updates
   - Small cleanups and fixes to multiple drivers
   - OMAP display subsystem bug updates
   - imxfb dt support"

* tag 'fbdev-for-3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/plagnioj/linux-fbdev: (95 commits)
  video: imxfb: Add DT support
  video: i740fb: Make i740fb_init static
  fb: make fp_get_options name argument const
  video: mmp: fix graphics/video layer enable/mask swap issue
  video: mmp: fix memcpy wrong size for mmp_addr issue
  radeon: use pdev->pm_cap instead of pci_find_capability(..,PCI_CAP_ID_PM)
  aty128fb: use pdev->pm_cap instead of pci_find_capability(..,PCI_CAP_ID_PM)
  video: of_display_timing.h: Declare 'display_timing'
  fbdev: bfin-lq035q1-fb: Use dev_pm_ops
  fbmem: return -EFAULT on copy_to_user() failure
  OMAPDSS: DPI: Fix wrong pixel clock limit
  video: replace strict_strtoul() with kstrtoul()
  uvesafb: Correct/simplify warning message
  fb: fix atyfb unused data warnings
  fb: fix atyfb build warning
  video: imxfb: Make local symbols static
  video: udlfb: Make local symbol static
  video: udlfb: Use NULL instead of 0
  video: smscufx: Use NULL instead of 0
  video: remove unnecessary platform_set_drvdata()
  ...
parents a82a729f 1b6c7936
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+51 −0
Original line number Diff line number Diff line
Freescale imx21 Framebuffer

This framebuffer driver supports devices imx1, imx21, imx25, and imx27.

Required properties:
- compatible : "fsl,<chip>-fb", chip should be imx1 or imx21
- reg : Should contain 1 register ranges(address and length)
- interrupts : One interrupt of the fb dev

Required nodes:
- display: Phandle to a display node as described in
	Documentation/devicetree/bindings/video/display-timing.txt
	Additional, the display node has to define properties:
	- bits-per-pixel: Bits per pixel
	- fsl,pcr: LCDC PCR value

Optional properties:
- fsl,dmacr: DMA Control Register value. This is optional. By default, the
	register is not modified as recommended by the datasheet.
- fsl,lscr1: LCDC Sharp Configuration Register value.

Example:

	imxfb: fb@10021000 {
		compatible = "fsl,imx21-fb";
		interrupts = <61>;
		reg = <0x10021000 0x1000>;
		display = <&display0>;
	};

	...

	display0: display0 {
		model = "Primeview-PD050VL1";
		native-mode = <&timing_disp0>;
		bits-per-pixel = <16>;
		fsl,pcr = <0xf0c88080>;	/* non-standard but required */
		display-timings {
			timing_disp0: 640x480 {
				hactive = <640>;
				vactive = <480>;
				hback-porch = <112>;
				hfront-porch = <36>;
				hsync-len = <32>;
				vback-porch = <33>;
				vfront-porch = <33>;
				vsync-len = <2>;
				clock-frequency = <25000000>;
			};
		};
	};
+7 −3
Original line number Diff line number Diff line
* Solomon SSD1307 Framebuffer Driver

Required properties:
  - compatible: Should be "solomon,ssd1307fb-<bus>". The only supported bus for
    now is i2c.
  - compatible: Should be "solomon,<chip>fb-<bus>". The only supported bus for
    now is i2c, and the supported chips are ssd1306 and ssd1307.
  - reg: Should contain address of the controller on the I2C bus. Most likely
         0x3c or 0x3d
  - pwm: Should contain the pwm to use according to the OF device tree PWM
         specification [0]
         specification [0]. Only required for the ssd1307.
  - reset-gpios: Should contain the GPIO used to reset the OLED display
  - solomon,height: Height in pixel of the screen driven by the controller
  - solomon,width: Width in pixel of the screen driven by the controller
  - solomon,page-offset: Offset of pages (band of 8 pixels) that the screen is
    mapped to.

Optional properties:
  - reset-active-low: Is the reset gpio is active on physical low?
+39 −7
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ struct omap_crtc {
	 * mgr->id.)  Eventually this will be replaced w/ something
	 * more common-panel-framework-y
	 */
	struct omap_overlay_manager mgr;
	struct omap_overlay_manager *mgr;

	struct omap_video_timings timings;
	bool enabled;
@@ -90,7 +90,32 @@ uint32_t pipe2vbl(struct drm_crtc *crtc)
 * job of sequencing the setup of the video pipe in the proper order
 */

/* ovl-mgr-id -> crtc */
static struct omap_crtc *omap_crtcs[8];

/* we can probably ignore these until we support command-mode panels: */
static int omap_crtc_connect(struct omap_overlay_manager *mgr,
		struct omap_dss_device *dst)
{
	if (mgr->output)
		return -EINVAL;

	if ((mgr->supported_outputs & dst->id) == 0)
		return -EINVAL;

	dst->manager = mgr;
	mgr->output = dst;

	return 0;
}

static void omap_crtc_disconnect(struct omap_overlay_manager *mgr,
		struct omap_dss_device *dst)
{
	mgr->output->manager = NULL;
	mgr->output = NULL;
}

static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
{
}
@@ -107,7 +132,7 @@ static void omap_crtc_disable(struct omap_overlay_manager *mgr)
static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
		const struct omap_video_timings *timings)
{
	struct omap_crtc *omap_crtc = container_of(mgr, struct omap_crtc, mgr);
	struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
	DBG("%s", omap_crtc->name);
	omap_crtc->timings = *timings;
	omap_crtc->full_update = true;
@@ -116,7 +141,7 @@ static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
		const struct dss_lcd_mgr_config *config)
{
	struct omap_crtc *omap_crtc = container_of(mgr, struct omap_crtc, mgr);
	struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
	DBG("%s", omap_crtc->name);
	dispc_mgr_set_lcd_config(omap_crtc->channel, config);
}
@@ -135,6 +160,8 @@ static void omap_crtc_unregister_framedone_handler(
}

static const struct dss_mgr_ops mgr_ops = {
		.connect = omap_crtc_connect,
		.disconnect = omap_crtc_disconnect,
		.start_update = omap_crtc_start_update,
		.enable = omap_crtc_enable,
		.disable = omap_crtc_disable,
@@ -569,7 +596,7 @@ static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
	} else {
		if (encoder) {
			omap_encoder_set_enabled(encoder, false);
			omap_encoder_update(encoder, &omap_crtc->mgr,
			omap_encoder_update(encoder, omap_crtc->mgr,
					&omap_crtc->timings);
			omap_encoder_set_enabled(encoder, true);
			omap_crtc->full_update = false;
@@ -595,6 +622,11 @@ static const char *channel_names[] = {
		[OMAP_DSS_CHANNEL_LCD2] = "lcd2",
};

void omap_crtc_pre_init(void)
{
	dss_install_mgr_ops(&mgr_ops);
}

/* initialize crtc */
struct drm_crtc *omap_crtc_init(struct drm_device *dev,
		struct drm_plane *plane, enum omap_channel channel, int id)
@@ -635,9 +667,7 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev,
	omap_irq_register(dev, &omap_crtc->error_irq);

	/* temporary: */
	omap_crtc->mgr.id = channel;

	dss_install_mgr_ops(&mgr_ops);
	omap_crtc->mgr = omap_dss_get_overlay_manager(channel);

	/* TODO: fix hard-coded setup.. add properties! */
	info = &omap_crtc->info;
@@ -651,6 +681,8 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev,

	omap_plane_install_properties(omap_crtc->plane, &crtc->base);

	omap_crtcs[channel] = omap_crtc;

	return crtc;

fail:
+21 −6
Original line number Diff line number Diff line
@@ -65,10 +65,8 @@ static int get_connector_type(struct omap_dss_device *dssdev)
	switch (dssdev->type) {
	case OMAP_DISPLAY_TYPE_HDMI:
		return DRM_MODE_CONNECTOR_HDMIA;
	case OMAP_DISPLAY_TYPE_DPI:
		if (!strcmp(dssdev->name, "dvi"))
	case OMAP_DISPLAY_TYPE_DVI:
		return DRM_MODE_CONNECTOR_DVID;
		/* fallthrough */
	default:
		return DRM_MODE_CONNECTOR_Unknown;
	}
@@ -97,6 +95,9 @@ static int omap_modeset_init(struct drm_device *dev)
	int num_mgrs = dss_feat_get_num_mgrs();
	int num_crtcs;
	int i, id = 0;
	int r;

	omap_crtc_pre_init();

	drm_mode_config_init(dev);

@@ -116,6 +117,7 @@ static int omap_modeset_init(struct drm_device *dev)
		struct drm_connector *connector;
		struct drm_encoder *encoder;
		enum omap_channel channel;
		struct omap_overlay_manager *mgr;

		if (!dssdev->driver) {
			dev_warn(dev->dev, "%s has no driver.. skipping it\n",
@@ -131,6 +133,13 @@ static int omap_modeset_init(struct drm_device *dev)
			continue;
		}

		r = dssdev->driver->connect(dssdev);
		if (r) {
			dev_err(dev->dev, "could not connect display: %s\n",
					dssdev->name);
			continue;
		}

		encoder = omap_encoder_init(dev, dssdev);

		if (!encoder) {
@@ -172,8 +181,9 @@ static int omap_modeset_init(struct drm_device *dev)
		 * other possible channels to which the encoder can connect are
		 * not considered.
		 */
		channel = dssdev->output->dispc_channel;

		mgr = omapdss_find_mgr_from_display(dssdev);
		channel = mgr->id;
		/*
		 * if this channel hasn't already been taken by a previously
		 * allocated crtc, we create a new crtc for it
@@ -247,6 +257,9 @@ static int omap_modeset_init(struct drm_device *dev)
		struct drm_encoder *encoder = priv->encoders[i];
		struct omap_dss_device *dssdev =
					omap_encoder_get_dssdev(encoder);
		struct omap_dss_device *output;

		output = omapdss_find_output_from_display(dssdev);

		/* figure out which crtc's we can connect the encoder to: */
		encoder->possible_crtcs = 0;
@@ -259,9 +272,11 @@ static int omap_modeset_init(struct drm_device *dev)
			supported_outputs =
				dss_feat_get_supported_outputs(crtc_channel);

			if (supported_outputs & dssdev->output->id)
			if (supported_outputs & output->id)
				encoder->possible_crtcs |= (1 << id);
		}

		omap_dss_put_device(output);
	}

	DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
+1 −0
Original line number Diff line number Diff line
@@ -157,6 +157,7 @@ const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc);
enum omap_channel omap_crtc_channel(struct drm_crtc *crtc);
int omap_crtc_apply(struct drm_crtc *crtc,
		struct omap_drm_apply *apply);
void omap_crtc_pre_init(void);
struct drm_crtc *omap_crtc_init(struct drm_device *dev,
		struct drm_plane *plane, enum omap_channel channel, int id);

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