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Commit 5e24f74b authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next 



Jeff Kirsher says:

====================
This series contains updates to ixgbe and pci.

The first patch for ixgbe from Greg Rose is the second submission.  The
first submission of "ixgbe: Retain VLAN filtering in promiscuous + VT
mode" had a typo, which Joe Perches pointed out and is fixed in this
submission.

Alex updates the ixgbe driver to use the generic helper pci_vfs_assigned
instead of the driver specific function ixgbe_vfs_are_assigned.

Don Skidmore provides 4 patches for ixgbe, the first being a fix for
flow control ethtool reporting.  Originally ixgbe_device_supports_autoneg_fc()
was expected to be called by only copper devices, which lead to false
information being displayed via ethtool.  Two other patches add support
for fixed fiber for SFP+ devices and the addition of a quad-port x520
adapter.  The last patch simply bumps the driver version.

Emil Tantilov provides 3 fixes for ixgbe, two of which resolve
semaphore lock issues.  The third fix resolves several issues in the
previous implementation of the SFF data dumps of SFP+ modules.

The remaining ixgbe and pci patches are from Jacob Keller.  The pci
patches exposes bus speed, link speed and bus width so that drivers
can take advantage of this information.  In addition, adds a pci function
which obtains minimum link width and speed.  Jacob also provides the
ixgbe patch to incorporate the pci function. He provides a patch that
fixes a lockdep issue created due to ixgbe_ptp_stop always running
cancel_work_sync even if the work item had not been created properly with
INIT_WORK. This issue was found and reported by Stephen Hemminger.

-v2-
* fix patch 3 to be a bool function based on David Miller's feedback
* fix patch 4 debug message based on David Miller's feedback
* fix patch 8 moved the extern declarations to pci.h based on Bjorn
  Helgaas's feedback
* fix patch 11 update the error message to include encoding loss based
* fix patch 8/9/10 title based on Bjorn's feedback
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents c0155b2d 8f58332b

drivers/net/ethernet/intel/ixgbe/ixgbe.h

+3 −4
Original line number Diff line number Diff line
@@ -618,9 +618,8 @@ struct ixgbe_adapter { 
#define IXGBE_FLAG2_FDIR_REQUIRES_REINIT        (u32)(1 << 7)

#define IXGBE_FLAG2_RSS_FIELD_IPV4_UDP		(u32)(1 << 8)

#define IXGBE_FLAG2_RSS_FIELD_IPV6_UDP		(u32)(1 << 9)

#define IXGBE_FLAG2_PTP_ENABLED			(u32)(1 << 10)

#define IXGBE_FLAG2_PTP_PPS_ENABLED		(u32)(1 << 11)

#define IXGBE_FLAG2_BRIDGE_MODE_VEB		(u32)(1 << 12)

#define IXGBE_FLAG2_PTP_PPS_ENABLED		(u32)(1 << 10)

#define IXGBE_FLAG2_BRIDGE_MODE_VEB		(u32)(1 << 11)



	/* Tx fast path data */

	int num_tx_queues;
@@ -754,7 +753,7 @@ enum ixgbe_state_t { 
	__IXGBE_DOWN,

	__IXGBE_SERVICE_SCHED,

	__IXGBE_IN_SFP_INIT,

	__IXGBE_READ_I2C,

	__IXGBE_PTP_RUNNING,

};



struct ixgbe_cb {

drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c

+23 −11
Original line number Diff line number Diff line
@@ -1018,8 +1018,17 @@ static s32 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr, 
	u16 sfp_addr = 0;

	u16 sfp_data = 0;

	u16 sfp_stat = 0;

	u16 gssr;

	u32 i;



	if (IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1)

		gssr = IXGBE_GSSR_PHY1_SM;

	else

		gssr = IXGBE_GSSR_PHY0_SM;



	if (hw->mac.ops.acquire_swfw_sync(hw, gssr) != 0)

		return IXGBE_ERR_SWFW_SYNC;



	if (hw->phy.type == ixgbe_phy_nl) {

		/*

		 * phy SDA/SCL registers are at addresses 0xC30A to
@@ -1028,14 +1037,14 @@ static s32 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr, 
		 */

		sfp_addr = (dev_addr << 8) + byte_offset;

		sfp_addr = (sfp_addr | IXGBE_I2C_EEPROM_READ_MASK);

		hw->phy.ops.write_reg(hw,

		hw->phy.ops.write_reg_mdi(hw,

					  IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR,

					  MDIO_MMD_PMAPMD,

					  sfp_addr);



		/* Poll status */

		for (i = 0; i < 100; i++) {

			hw->phy.ops.read_reg(hw,

			hw->phy.ops.read_reg_mdi(hw,

						IXGBE_MDIO_PMA_PMD_SDA_SCL_STAT,

						MDIO_MMD_PMAPMD,

						&sfp_stat);
@@ -1052,7 +1061,7 @@ static s32 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr, 
		}



		/* Read data */

		hw->phy.ops.read_reg(hw, IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA,

		hw->phy.ops.read_reg_mdi(hw, IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA,

					MDIO_MMD_PMAPMD, &sfp_data);



		*eeprom_data = (u8)(sfp_data >> 8);
@@ -1061,6 +1070,7 @@ static s32 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr, 
	}



out:

	hw->mac.ops.release_swfw_sync(hw, gssr);

	return status;

}
@@ -1321,11 +1331,13 @@ static struct ixgbe_eeprom_operations eeprom_ops_82598 = { 


static struct ixgbe_phy_operations phy_ops_82598 = {

	.identify		= &ixgbe_identify_phy_generic,

	.identify_sfp		= &ixgbe_identify_sfp_module_generic,

	.identify_sfp		= &ixgbe_identify_module_generic,

	.init			= &ixgbe_init_phy_ops_82598,

	.reset			= &ixgbe_reset_phy_generic,

	.read_reg		= &ixgbe_read_phy_reg_generic,

	.write_reg		= &ixgbe_write_phy_reg_generic,

	.read_reg_mdi		= &ixgbe_read_phy_reg_mdi,

	.write_reg_mdi		= &ixgbe_write_phy_reg_mdi,

	.setup_link		= &ixgbe_setup_phy_link_generic,

	.setup_link_speed	= &ixgbe_setup_phy_link_speed_generic,

	.read_i2c_sff8472	= &ixgbe_read_i2c_sff8472_82598,

drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c

+231 −9
Original line number Diff line number Diff line
@@ -58,6 +58,10 @@ static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw, 
                                         ixgbe_link_speed speed,

                                         bool autoneg_wait_to_complete);

static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw);

static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,

				     u8 dev_addr, u8 *data);

static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,

				      u8 dev_addr, u8 data);



static bool ixgbe_mng_enabled(struct ixgbe_hw *hw)

{
@@ -219,6 +223,25 @@ static s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw) 
	struct ixgbe_mac_info *mac = &hw->mac;

	struct ixgbe_phy_info *phy = &hw->phy;

	s32 ret_val = 0;

	u32 esdp;



	if (hw->device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) {

		/* Store flag indicating I2C bus access control unit. */

		hw->phy.qsfp_shared_i2c_bus = true;



		/* Initialize access to QSFP+ I2C bus */

		esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

		esdp |= IXGBE_ESDP_SDP0_DIR;

		esdp &= ~IXGBE_ESDP_SDP1_DIR;

		esdp &= ~IXGBE_ESDP_SDP0;

		esdp &= ~IXGBE_ESDP_SDP0_NATIVE;

		esdp &= ~IXGBE_ESDP_SDP1_NATIVE;

		IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

		IXGBE_WRITE_FLUSH(hw);



		phy->ops.read_i2c_byte = &ixgbe_read_i2c_byte_82599;

		phy->ops.write_i2c_byte = &ixgbe_write_i2c_byte_82599;

	}



	/* Identify the PHY or SFP module */

	ret_val = phy->ops.identify(hw);
@@ -397,6 +420,9 @@ static enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw) 
	case IXGBE_DEV_ID_82599_LS:

		media_type = ixgbe_media_type_fiber_lco;

		break;

	case IXGBE_DEV_ID_82599_QSFP_SF_QP:

		media_type = ixgbe_media_type_fiber_qsfp;

		break;

	default:

		media_type = ixgbe_media_type_unknown;

		break;
@@ -526,6 +552,75 @@ static void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw) 
	}

}



/**

 *  ixgbe_set_fiber_fixed_speed - Set module link speed for fixed fiber

 *  @hw: pointer to hardware structure

 *  @speed: link speed to set

 *

 *  We set the module speed differently for fixed fiber.  For other

 *  multi-speed devices we don't have an error value so here if we

 *  detect an error we just log it and exit.

 */

static void ixgbe_set_fiber_fixed_speed(struct ixgbe_hw *hw,

					ixgbe_link_speed speed)

{

	s32 status;

	u8 rs, eeprom_data;



	switch (speed) {

	case IXGBE_LINK_SPEED_10GB_FULL:

		/* one bit mask same as setting on */

		rs = IXGBE_SFF_SOFT_RS_SELECT_10G;

		break;

	case IXGBE_LINK_SPEED_1GB_FULL:

		rs = IXGBE_SFF_SOFT_RS_SELECT_1G;

		break;

	default:

		hw_dbg(hw, "Invalid fixed module speed\n");

		return;

	}



	/* Set RS0 */

	status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB,

					   IXGBE_I2C_EEPROM_DEV_ADDR2,

					   &eeprom_data);

	if (status) {

		hw_dbg(hw, "Failed to read Rx Rate Select RS0\n");

		goto out;

	}



	eeprom_data = (eeprom_data & ~IXGBE_SFF_SOFT_RS_SELECT_MASK) & rs;



	status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB,

					    IXGBE_I2C_EEPROM_DEV_ADDR2,

					    eeprom_data);

	if (status) {

		hw_dbg(hw, "Failed to write Rx Rate Select RS0\n");

		goto out;

	}



	/* Set RS1 */

	status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB,

					   IXGBE_I2C_EEPROM_DEV_ADDR2,

					   &eeprom_data);

	if (status) {

		hw_dbg(hw, "Failed to read Rx Rate Select RS1\n");

		goto out;

	}



	eeprom_data = (eeprom_data & ~IXGBE_SFF_SOFT_RS_SELECT_MASK) & rs;



	status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB,

					    IXGBE_I2C_EEPROM_DEV_ADDR2,

					    eeprom_data);

	if (status) {

		hw_dbg(hw, "Failed to write Rx Rate Select RS1\n");

		goto out;

	}

out:

	return;

}



/**

 *  ixgbe_setup_mac_link_multispeed_fiber - Set MAC link speed

 *  @hw: pointer to hardware structure
@@ -573,9 +668,14 @@ static s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw, 
			goto out;



		/* Set the module link speed */

		if (hw->phy.media_type == ixgbe_media_type_fiber_fixed) {

			ixgbe_set_fiber_fixed_speed(hw,

					IXGBE_LINK_SPEED_10GB_FULL);

		} else {

			esdp_reg |= (IXGBE_ESDP_SDP5_DIR | IXGBE_ESDP_SDP5);

			IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg);

			IXGBE_WRITE_FLUSH(hw);

		}



		/* Allow module to change analog characteristics (1G->10G) */

		msleep(40);
@@ -625,10 +725,15 @@ static s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw, 
			goto out;



		/* Set the module link speed */

		if (hw->phy.media_type == ixgbe_media_type_fiber_fixed) {

			ixgbe_set_fiber_fixed_speed(hw,

						IXGBE_LINK_SPEED_1GB_FULL);

		} else {

			esdp_reg &= ~IXGBE_ESDP_SDP5;

			esdp_reg |= IXGBE_ESDP_SDP5_DIR;

			IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg);

			IXGBE_WRITE_FLUSH(hw);

		}



		/* Allow module to change analog characteristics (10G->1G) */

		msleep(40);
@@ -1872,7 +1977,7 @@ static s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw) 
		if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper)

			goto out;

		else

			status = ixgbe_identify_sfp_module_generic(hw);

			status = ixgbe_identify_module_generic(hw);

	}



	/* Set PHY type none if no PHY detected */
@@ -1978,10 +2083,12 @@ sfp_check: 
	switch (hw->phy.type) {

	case ixgbe_phy_sfp_passive_tyco:

	case ixgbe_phy_sfp_passive_unknown:

	case ixgbe_phy_qsfp_passive_unknown:

		physical_layer = IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU;

		break;

	case ixgbe_phy_sfp_ftl_active:

	case ixgbe_phy_sfp_active_unknown:

	case ixgbe_phy_qsfp_active_unknown:

		physical_layer = IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA;

		break;

	case ixgbe_phy_sfp_avago:
@@ -1999,6 +2106,15 @@ sfp_check: 
		else if (comp_codes_1g & IXGBE_SFF_1GBASET_CAPABLE)

			physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_T;

		break;

	case ixgbe_phy_qsfp_intel:

	case ixgbe_phy_qsfp_unknown:

		hw->phy.ops.read_i2c_eeprom(hw,

			IXGBE_SFF_QSFP_10GBE_COMP, &comp_codes_10g);

		if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE)

			physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR;

		else if (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE)

			physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR;

		break;

	default:

		break;

	}
@@ -2236,6 +2352,112 @@ reset_pipeline_out: 
	return ret_val;

}



/**

 *  ixgbe_read_i2c_byte_82599 - Reads 8 bit word over I2C

 *  @hw: pointer to hardware structure

 *  @byte_offset: byte offset to read

 *  @data: value read

 *

 *  Performs byte read operation to SFP module's EEPROM over I2C interface at

 *  a specified device address.

 **/

static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,

				     u8 dev_addr, u8 *data)

{

	u32 esdp;

	s32 status;

	s32 timeout = 200;



	if (hw->phy.qsfp_shared_i2c_bus == true) {

		/* Acquire I2C bus ownership. */

		esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

		esdp |= IXGBE_ESDP_SDP0;

		IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

		IXGBE_WRITE_FLUSH(hw);



		while (timeout) {

			esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

			if (esdp & IXGBE_ESDP_SDP1)

				break;



			usleep_range(5000, 10000);

			timeout--;

		}



		if (!timeout) {

			hw_dbg(hw, "Driver can't access resource, acquiring I2C bus timeout.\n");

			status = IXGBE_ERR_I2C;

			goto release_i2c_access;

		}

	}



	status = ixgbe_read_i2c_byte_generic(hw, byte_offset, dev_addr, data);



release_i2c_access:

	if (hw->phy.qsfp_shared_i2c_bus == true) {

		/* Release I2C bus ownership. */

		esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

		esdp &= ~IXGBE_ESDP_SDP0;

		IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

		IXGBE_WRITE_FLUSH(hw);

	}



	return status;

}



/**

 *  ixgbe_write_i2c_byte_82599 - Writes 8 bit word over I2C

 *  @hw: pointer to hardware structure

 *  @byte_offset: byte offset to write

 *  @data: value to write

 *

 *  Performs byte write operation to SFP module's EEPROM over I2C interface at

 *  a specified device address.

 **/

static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,

				      u8 dev_addr, u8 data)

{

	u32 esdp;

	s32 status;

	s32 timeout = 200;



	if (hw->phy.qsfp_shared_i2c_bus == true) {

		/* Acquire I2C bus ownership. */

		esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

		esdp |= IXGBE_ESDP_SDP0;

		IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

		IXGBE_WRITE_FLUSH(hw);



		while (timeout) {

			esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

			if (esdp & IXGBE_ESDP_SDP1)

				break;



			usleep_range(5000, 10000);

			timeout--;

		}



		if (!timeout) {

			hw_dbg(hw, "Driver can't access resource, acquiring I2C bus timeout.\n");

			status = IXGBE_ERR_I2C;

			goto release_i2c_access;

		}

	}



	status = ixgbe_write_i2c_byte_generic(hw, byte_offset, dev_addr, data);



release_i2c_access:

	if (hw->phy.qsfp_shared_i2c_bus == true) {

		/* Release I2C bus ownership. */

		esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

		esdp &= ~IXGBE_ESDP_SDP0;

		IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

		IXGBE_WRITE_FLUSH(hw);

	}



	return status;

}



static struct ixgbe_mac_operations mac_ops_82599 = {

	.init_hw                = &ixgbe_init_hw_generic,

	.reset_hw               = &ixgbe_reset_hw_82599,
@@ -2300,7 +2522,7 @@ static struct ixgbe_eeprom_operations eeprom_ops_82599 = { 


static struct ixgbe_phy_operations phy_ops_82599 = {

	.identify		= &ixgbe_identify_phy_82599,

	.identify_sfp		= &ixgbe_identify_sfp_module_generic,

	.identify_sfp		= &ixgbe_identify_module_generic,

	.init			= &ixgbe_init_phy_ops_82599,

	.reset			= &ixgbe_reset_phy_generic,

	.read_reg		= &ixgbe_read_phy_reg_generic,

drivers/net/ethernet/intel/ixgbe/ixgbe_common.c

+57 −33
Original line number Diff line number Diff line
@@ -65,17 +65,42 @@ static s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw); 
 *  function check the device id to see if the associated phy supports

 *  autoneg flow control.

 **/

s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)

bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)

{

	bool supported = false;

	ixgbe_link_speed speed;

	bool link_up;



	switch (hw->phy.media_type) {

	case ixgbe_media_type_fiber_fixed:

	case ixgbe_media_type_fiber:

		hw->mac.ops.check_link(hw, &speed, &link_up, false);

		/* if link is down, assume supported */

		if (link_up)

			supported = speed == IXGBE_LINK_SPEED_1GB_FULL ?

				true : false;

		else

			supported = true;

		break;

	case ixgbe_media_type_backplane:

		supported = true;

		break;

	case ixgbe_media_type_copper:

		/* only some copper devices support flow control autoneg */

		switch (hw->device_id) {

		case IXGBE_DEV_ID_82599_T3_LOM:

		case IXGBE_DEV_ID_X540T:

		case IXGBE_DEV_ID_X540T1:

	case IXGBE_DEV_ID_82599_T3_LOM:

		return 0;

			supported = true;

			break;

		default:

			break;

		}

	default:

		return IXGBE_ERR_FC_NOT_SUPPORTED;

		break;

	}



	return supported;

}



/**
@@ -114,6 +139,7 @@ static s32 ixgbe_setup_fc(struct ixgbe_hw *hw) 
	 * we link at 10G, the 1G advertisement is harmless and vice versa.

	 */

	switch (hw->phy.media_type) {

	case ixgbe_media_type_fiber_fixed:

	case ixgbe_media_type_fiber:

	case ixgbe_media_type_backplane:

		reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
@@ -234,7 +260,7 @@ static s32 ixgbe_setup_fc(struct ixgbe_hw *hw) 
						      IXGBE_GSSR_MAC_CSR_SM);



	} else if ((hw->phy.media_type == ixgbe_media_type_copper) &&

		    (ixgbe_device_supports_autoneg_fc(hw) == 0)) {

		    ixgbe_device_supports_autoneg_fc(hw)) {

		hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE,

				      MDIO_MMD_AN, reg_cu);

	}
@@ -2380,6 +2406,7 @@ void ixgbe_fc_autoneg(struct ixgbe_hw *hw) 


	switch (hw->phy.media_type) {

	/* Autoneg flow control on fiber adapters */

	case ixgbe_media_type_fiber_fixed:

	case ixgbe_media_type_fiber:

		if (speed == IXGBE_LINK_SPEED_1GB_FULL)

			ret_val = ixgbe_fc_autoneg_fiber(hw);
@@ -2392,7 +2419,7 @@ void ixgbe_fc_autoneg(struct ixgbe_hw *hw) 


	/* Autoneg flow control on copper adapters */

	case ixgbe_media_type_copper:

		if (ixgbe_device_supports_autoneg_fc(hw) == 0)

		if (ixgbe_device_supports_autoneg_fc(hw))

			ret_val = ixgbe_fc_autoneg_copper(hw);

		break;
@@ -2479,42 +2506,39 @@ out: 
 **/

s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask)

{

	u32 gssr;

	u32 gssr = 0;

	u32 swmask = mask;

	u32 fwmask = mask << 5;

	s32 timeout = 200;

	u32 timeout = 200;

	u32 i;



	while (timeout) {

	for (i = 0; i < timeout; i++) {

		/*

		 * SW EEPROM semaphore bit is used for access to all

		 * SW_FW_SYNC/GSSR bits (not just EEPROM)

		 * SW NVM semaphore bit is used for access to all

		 * SW_FW_SYNC bits (not just NVM)

		 */

		if (ixgbe_get_eeprom_semaphore(hw))

			return IXGBE_ERR_SWFW_SYNC;



		gssr = IXGBE_READ_REG(hw, IXGBE_GSSR);

		if (!(gssr & (fwmask | swmask)))

			break;



		/*

		 * Firmware currently using resource (fwmask) or other software

		 * thread currently using resource (swmask)

		 */

		if (!(gssr & (fwmask | swmask))) {

			gssr |= swmask;

			IXGBE_WRITE_REG(hw, IXGBE_GSSR, gssr);

			ixgbe_release_eeprom_semaphore(hw);

			return 0;

		} else {

			/* Resource is currently in use by FW or SW */

			ixgbe_release_eeprom_semaphore(hw);

			usleep_range(5000, 10000);

		timeout--;

		}



	if (!timeout) {

		hw_dbg(hw, "Driver can't access resource, SW_FW_SYNC timeout.\n");

		return IXGBE_ERR_SWFW_SYNC;

	}



	gssr |= swmask;

	IXGBE_WRITE_REG(hw, IXGBE_GSSR, gssr);

	/* If time expired clear the bits holding the lock and retry */

	if (gssr & (fwmask | swmask))

		ixgbe_release_swfw_sync(hw, gssr & (fwmask | swmask));



	ixgbe_release_eeprom_semaphore(hw);

	return 0;

	usleep_range(5000, 10000);

	return IXGBE_ERR_SWFW_SYNC;

}



/**

drivers/net/ethernet/intel/ixgbe/ixgbe_common.h

+1 −1
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@ s32 ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw); 
s32 ixgbe_enable_rx_buff_generic(struct ixgbe_hw *hw);

s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);

s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);

s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);

bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);

void ixgbe_fc_autoneg(struct ixgbe_hw *hw);



s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask);