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Commit 5cf8b240 authored by Steven J. Hill's avatar Steven J. Hill Committed by Ralf Baechle
Browse files

MIPS: GIC: Send IPIs using the GIC 



If GIC is present, then use it to send IPIs between the cores.
Using GIC for IPIs is simpler and is usable for multicore
systems compared to the existing way of doing IPIs where all VPEs
had to be disabled for another VPE to access the Cause register
in one of the TCs and enable all the VPEs back.

Signed-off-by: default avatarSteven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6040/
parent c2c2a644

arch/mips/kernel/smp-mt.c

+27 −0
Original line number Diff line number Diff line
@@ -113,12 +113,39 @@ static void __init smvp_tc_init(unsigned int tc, unsigned int mvpconf0) 
	write_tc_c0_tchalt(TCHALT_H);

}



#ifdef CONFIG_IRQ_GIC

static void mp_send_ipi_single(int cpu, unsigned int action)

{

	unsigned long flags;



	local_irq_save(flags);



	switch (action) {

	case SMP_CALL_FUNCTION:

		gic_send_ipi(plat_ipi_call_int_xlate(cpu));

		break;



	case SMP_RESCHEDULE_YOURSELF:

		gic_send_ipi(plat_ipi_resched_int_xlate(cpu));

		break;

	}



	local_irq_restore(flags);

}

#endif



static void vsmp_send_ipi_single(int cpu, unsigned int action)

{

	int i;

	unsigned long flags;

	int vpflags;



#ifdef CONFIG_IRQ_GIC

	if (gic_present) {

		mp_send_ipi_single(cpu, action);

		return;

	}

#endif

	local_irq_save(flags);



	vpflags = dvpe();	/* can't access the other CPU's registers whilst MVPE enabled */