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Commit 5c849cf5 authored by Simon Horman's avatar Simon Horman Committed by Sasha Levin
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ARM: shmobile: r8a7791: Correct SDHI clock labels and output-names 



[ Upstream commit 2ea0d4ec39ac837e34c07b4783a7c900940e6eaf ]

There appears to have been some inconsistency and confusion here as on
the r8a7790 these clocks are referred to as SD(HI)1 and SD(HI)2 while on
the r8a7791 and r8a7794 they are referred to as SD(HI)2 and SD(HI)3.

Fixes: 59e79895 ("ARM: shmobile: r8a7791: Add clocks")
Reported-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Acked-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSasha Levin <sasha.levin@oracle.com>
parent 4a46458b

arch/arm/boot/dts/r8a7791.dtsi

+5 −5
Original line number Diff line number Diff line
@@ -695,19 +695,19 @@ 
		};



		/* Variable factor clocks */

		sd1_clk: sd2_clk@e6150078 {

		sd2_clk: sd2_clk@e6150078 {

			compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";

			reg = <0 0xe6150078 0 4>;

			clocks = <&pll1_div2_clk>;

			#clock-cells = <0>;

			clock-output-names = "sd1";

			clock-output-names = "sd2";

		};

		sd2_clk: sd3_clk@e615026c {

		sd3_clk: sd3_clk@e615026c {

			compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";

			reg = <0 0xe615026c 0 4>;

			clocks = <&pll1_div2_clk>;

			#clock-cells = <0>;

			clock-output-names = "sd2";

			clock-output-names = "sd3";

		};

		mmc0_clk: mmc0_clk@e6150240 {

			compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
@@ -922,7 +922,7 @@ 
		mstp3_clks: mstp3_clks@e615013c {

			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";

			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;

			clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>,

			clocks = <&cp_clk>, <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7791_CLK_SD0>,

				 <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,

				 <&hp_clk>, <&hp_clk>;

			#clock-cells = <1>;