Loading Documentation/devicetree/bindings/arm/cpus.txt +1 −1 Original line number Diff line number Diff line Loading @@ -185,7 +185,7 @@ nodes to be present and contain the properties described below. be one of: "psci" "spin-table" "qcom,titanium-arm-cortex-acc" "qcom,8953-arm-cortex-acc" "qcom,8937-arm-cortex-acc" # On ARM 32-bit systems this property is optional and Loading Documentation/devicetree/bindings/arm/msm/clock-controller.txt +4 −4 Original line number Diff line number Diff line Loading @@ -25,7 +25,7 @@ Required properties: "qcom,gcc-8937" "qcom,gcc-gold" "qcom,gcc-spm-8937" "qcom,gcc-titanium" "qcom,gcc-8953" "qcom,rpmcc-8994" "qcom,rpmcc-8992" "qcom,rpmcc-8916" Loading @@ -37,7 +37,7 @@ Required properties: "qcom,cc-debug-8992" "qcom,cc-debug-8994" "qcom,cc-debug-8952" "qcom,cc-debug-titanium" "qcom,cc-debug-8953" "qcom,cc-debug-fsm9010" "qcom,cc-debug-8996" "qcom,cc-debug-8996-v2" Loading @@ -50,7 +50,7 @@ Required properties: "qcom,gcc-mdss-8952" "qcom,gcc-mdss-8937" "qcom,gcc-mdss-gold" "qcom,gcc-mdss-titanium" "qcom,gcc-mdss-8953" "qcom,mmsscc-8994v2" "qcom,mmsscc-8994" "qcom,mmsscc-8992" Loading @@ -63,7 +63,7 @@ Required properties: "qcom,gpucc-8996-v3" "qcom,gpucc-8996-v3.0" "qcom,gpucc-8996-pro" "qcom,gcc-gfx-titanium" "qcom,gcc-gfx-8953" "qcom,gcc-californium" "qcom,cc-debug-californium" "qcom,gcc-mdm9607" Loading Documentation/devicetree/bindings/arm/msm/clock-cpu-titanium.txt→Documentation/devicetree/bindings/arm/msm/clock-cpu-8953.txt +9 −9 Original line number Diff line number Diff line Qualcomm MSMTITANIUM CPU clock tree Qualcomm MSM8953 CPU clock tree clock-cpu-titanium is a device that represents the MSMTITANIUM CPU subystem clock clock-cpu-8953 is a device that represents the MSM8953 CPU subystem clock tree. It lists the various power supplies that need to be scaled when the clocks are scaled and also other HW specific parameters like fmax tables etc. Loading @@ -9,7 +9,7 @@ Ramp control will allow programming the sequence ID for pulse swallowing, enable sequence and for linking sequence IDs. Required properties: - compatible: Must be "qcom,clock-cpu-titanium". - compatible: Must be "qcom,clock-cpu-8953". - reg: Pairs of physical base addresses and region sizes of memory mapped registers. Loading Loading @@ -56,8 +56,8 @@ Optional Properties: allow the cluster cores to go to low power mode. Example: clock_cpu: qcom,cpu-clock-titanium@b116000 { compatible = "qcom,cpu-clock-titanium"; clock_cpu: qcom,cpu-clock-8953@b116000 { compatible = "qcom,cpu-clock-8953"; reg = <0xb114000 0x68>, <0xb014000 0x68>, <0xb116000 0x400>, Loading @@ -68,7 +68,7 @@ Example: reg-names = "rcgwr-c0-base", "rcgwr-c1-base", "c0-pll", "c0-mux", "c1-mux", "cci-mux", "efuse"; vdd-mx-supply = <&pmtitanium_s7_level_ao>; vdd-mx-supply = <&pm8953_s7_level_ao>; vdd-cl-supply = <&apc_vreg_corner>; clocks = <&clock_gcc clk_xo_a_clk_src>; clock-names = "xo_a"; Loading @@ -85,8 +85,8 @@ Example: In case vmin & boost delta defined. clock_cpu: qcom,cpu-clock-titanium@b116000 { compatible = "qcom,cpu-clock-titanium"; clock_cpu: qcom,cpu-clock-8953@b116000 { compatible = "qcom,cpu-clock-8953"; reg = <0xb114000 0x68>, <0xb014000 0x68>, <0xb116000 0x400>, Loading @@ -97,7 +97,7 @@ In case vmin & boost delta defined. reg-names = "rcgwr-c0-base", "rcgwr-c1-base", "c0-pll", "c0-mux", "c1-mux", "cci-mux", "efuse"; vdd-mx-supply = <&pmtitanium_s7_level_ao>; vdd-mx-supply = <&pm8953_s7_level_ao>; vdd-cl-supply = <&apc_vreg_corner>; clocks = <&clock_gcc clk_xo_a_clk_src>; clock-names = "xo_a"; Loading Documentation/devicetree/bindings/arm/msm/l2ccc.txt +1 −1 Original line number Diff line number Diff line Loading @@ -7,7 +7,7 @@ region per CPU Cluster. Required properties: - compatible: Can be one of: "qcom,8916-l2ccc" "qcom,titanium-l2ccc" "qcom,8953-l2ccc" "qcom,8937-l2ccc" - reg: This specifies the base address and size of the register region. Loading Documentation/devicetree/bindings/arm/msm/msm.txt +12 −12 Original line number Diff line number Diff line Loading @@ -47,8 +47,8 @@ SoCs: - APQGOLD compatible = "qcom,apqgold" - APQTITANIUM compatible = "qcom,apqtitanium" - APQ8953 compatible = "qcom,apq8953" - MDM9630 compatible = "qcom,mdm9630" Loading Loading @@ -92,8 +92,8 @@ SoCs: - APQ8052 compatible = "qcom,apq8052" - MSMTITANIUM compatible = "qcom,msmtitanium" - MSM8953 compatible = "qcom,msm8953" - MSM8937 compatible = "qcom,msm8937" Loading Loading @@ -177,8 +177,8 @@ compatible = "qcom,apq8037-cdp" compatible = "qcom,apq8037-mtp" compatible = "qcom,apqgold-cdp" compatible = "qcom,apqgold-mtp" compatible = "qcom,apqtitanium-cdp" compatible = "qcom,apqtitanium-mtp" compatible = "qcom,apq8953-cdp" compatible = "qcom,apq8953-mtp" compatible = "qcom,mdm9630-cdp" compatible = "qcom,mdm9630-mtp" compatible = "qcom,mdm9630-sim" Loading Loading @@ -267,12 +267,12 @@ compatible = "qcom,msm8937-mtp" compatible = "qcom,msm8937-qrd" compatible = "qcom,msm8937-pmi8950-qrd-sku1" compatible = "qcom,msm8937-pmi8937-qrd-sku2" compatible = "qcom,msmtitanium-rumi" compatible = "qcom,msmtitanium-sim" compatible = "qcom,msmtitanium-cdp" compatible = "qcom,msmtitanium-mtp" compatible = "qcom,msmtitanium-qrd" compatible = "qcom,msmtitanium-qrd-sku3" compatible = "qcom,msm8953-rumi" compatible = "qcom,msm8953-sim" compatible = "qcom,msm8953-cdp" compatible = "qcom,msm8953-mtp" compatible = "qcom,msm8953-qrd" compatible = "qcom,msm8953-qrd-sku3" compatible = "qcom,mdm9640-cdp" compatible = "qcom,mdm9640-mtp" compatible = "qcom,mdm9640-rumi" Loading Loading
Documentation/devicetree/bindings/arm/cpus.txt +1 −1 Original line number Diff line number Diff line Loading @@ -185,7 +185,7 @@ nodes to be present and contain the properties described below. be one of: "psci" "spin-table" "qcom,titanium-arm-cortex-acc" "qcom,8953-arm-cortex-acc" "qcom,8937-arm-cortex-acc" # On ARM 32-bit systems this property is optional and Loading
Documentation/devicetree/bindings/arm/msm/clock-controller.txt +4 −4 Original line number Diff line number Diff line Loading @@ -25,7 +25,7 @@ Required properties: "qcom,gcc-8937" "qcom,gcc-gold" "qcom,gcc-spm-8937" "qcom,gcc-titanium" "qcom,gcc-8953" "qcom,rpmcc-8994" "qcom,rpmcc-8992" "qcom,rpmcc-8916" Loading @@ -37,7 +37,7 @@ Required properties: "qcom,cc-debug-8992" "qcom,cc-debug-8994" "qcom,cc-debug-8952" "qcom,cc-debug-titanium" "qcom,cc-debug-8953" "qcom,cc-debug-fsm9010" "qcom,cc-debug-8996" "qcom,cc-debug-8996-v2" Loading @@ -50,7 +50,7 @@ Required properties: "qcom,gcc-mdss-8952" "qcom,gcc-mdss-8937" "qcom,gcc-mdss-gold" "qcom,gcc-mdss-titanium" "qcom,gcc-mdss-8953" "qcom,mmsscc-8994v2" "qcom,mmsscc-8994" "qcom,mmsscc-8992" Loading @@ -63,7 +63,7 @@ Required properties: "qcom,gpucc-8996-v3" "qcom,gpucc-8996-v3.0" "qcom,gpucc-8996-pro" "qcom,gcc-gfx-titanium" "qcom,gcc-gfx-8953" "qcom,gcc-californium" "qcom,cc-debug-californium" "qcom,gcc-mdm9607" Loading
Documentation/devicetree/bindings/arm/msm/clock-cpu-titanium.txt→Documentation/devicetree/bindings/arm/msm/clock-cpu-8953.txt +9 −9 Original line number Diff line number Diff line Qualcomm MSMTITANIUM CPU clock tree Qualcomm MSM8953 CPU clock tree clock-cpu-titanium is a device that represents the MSMTITANIUM CPU subystem clock clock-cpu-8953 is a device that represents the MSM8953 CPU subystem clock tree. It lists the various power supplies that need to be scaled when the clocks are scaled and also other HW specific parameters like fmax tables etc. Loading @@ -9,7 +9,7 @@ Ramp control will allow programming the sequence ID for pulse swallowing, enable sequence and for linking sequence IDs. Required properties: - compatible: Must be "qcom,clock-cpu-titanium". - compatible: Must be "qcom,clock-cpu-8953". - reg: Pairs of physical base addresses and region sizes of memory mapped registers. Loading Loading @@ -56,8 +56,8 @@ Optional Properties: allow the cluster cores to go to low power mode. Example: clock_cpu: qcom,cpu-clock-titanium@b116000 { compatible = "qcom,cpu-clock-titanium"; clock_cpu: qcom,cpu-clock-8953@b116000 { compatible = "qcom,cpu-clock-8953"; reg = <0xb114000 0x68>, <0xb014000 0x68>, <0xb116000 0x400>, Loading @@ -68,7 +68,7 @@ Example: reg-names = "rcgwr-c0-base", "rcgwr-c1-base", "c0-pll", "c0-mux", "c1-mux", "cci-mux", "efuse"; vdd-mx-supply = <&pmtitanium_s7_level_ao>; vdd-mx-supply = <&pm8953_s7_level_ao>; vdd-cl-supply = <&apc_vreg_corner>; clocks = <&clock_gcc clk_xo_a_clk_src>; clock-names = "xo_a"; Loading @@ -85,8 +85,8 @@ Example: In case vmin & boost delta defined. clock_cpu: qcom,cpu-clock-titanium@b116000 { compatible = "qcom,cpu-clock-titanium"; clock_cpu: qcom,cpu-clock-8953@b116000 { compatible = "qcom,cpu-clock-8953"; reg = <0xb114000 0x68>, <0xb014000 0x68>, <0xb116000 0x400>, Loading @@ -97,7 +97,7 @@ In case vmin & boost delta defined. reg-names = "rcgwr-c0-base", "rcgwr-c1-base", "c0-pll", "c0-mux", "c1-mux", "cci-mux", "efuse"; vdd-mx-supply = <&pmtitanium_s7_level_ao>; vdd-mx-supply = <&pm8953_s7_level_ao>; vdd-cl-supply = <&apc_vreg_corner>; clocks = <&clock_gcc clk_xo_a_clk_src>; clock-names = "xo_a"; Loading
Documentation/devicetree/bindings/arm/msm/l2ccc.txt +1 −1 Original line number Diff line number Diff line Loading @@ -7,7 +7,7 @@ region per CPU Cluster. Required properties: - compatible: Can be one of: "qcom,8916-l2ccc" "qcom,titanium-l2ccc" "qcom,8953-l2ccc" "qcom,8937-l2ccc" - reg: This specifies the base address and size of the register region. Loading
Documentation/devicetree/bindings/arm/msm/msm.txt +12 −12 Original line number Diff line number Diff line Loading @@ -47,8 +47,8 @@ SoCs: - APQGOLD compatible = "qcom,apqgold" - APQTITANIUM compatible = "qcom,apqtitanium" - APQ8953 compatible = "qcom,apq8953" - MDM9630 compatible = "qcom,mdm9630" Loading Loading @@ -92,8 +92,8 @@ SoCs: - APQ8052 compatible = "qcom,apq8052" - MSMTITANIUM compatible = "qcom,msmtitanium" - MSM8953 compatible = "qcom,msm8953" - MSM8937 compatible = "qcom,msm8937" Loading Loading @@ -177,8 +177,8 @@ compatible = "qcom,apq8037-cdp" compatible = "qcom,apq8037-mtp" compatible = "qcom,apqgold-cdp" compatible = "qcom,apqgold-mtp" compatible = "qcom,apqtitanium-cdp" compatible = "qcom,apqtitanium-mtp" compatible = "qcom,apq8953-cdp" compatible = "qcom,apq8953-mtp" compatible = "qcom,mdm9630-cdp" compatible = "qcom,mdm9630-mtp" compatible = "qcom,mdm9630-sim" Loading Loading @@ -267,12 +267,12 @@ compatible = "qcom,msm8937-mtp" compatible = "qcom,msm8937-qrd" compatible = "qcom,msm8937-pmi8950-qrd-sku1" compatible = "qcom,msm8937-pmi8937-qrd-sku2" compatible = "qcom,msmtitanium-rumi" compatible = "qcom,msmtitanium-sim" compatible = "qcom,msmtitanium-cdp" compatible = "qcom,msmtitanium-mtp" compatible = "qcom,msmtitanium-qrd" compatible = "qcom,msmtitanium-qrd-sku3" compatible = "qcom,msm8953-rumi" compatible = "qcom,msm8953-sim" compatible = "qcom,msm8953-cdp" compatible = "qcom,msm8953-mtp" compatible = "qcom,msm8953-qrd" compatible = "qcom,msm8953-qrd-sku3" compatible = "qcom,mdm9640-cdp" compatible = "qcom,mdm9640-mtp" compatible = "qcom,mdm9640-rumi" Loading