Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5c320a06 authored by Archana Sathyakumar's avatar Archana Sathyakumar
Browse files

qcom: spm: Support SAW4 power configuration 



SAW4 hardware needs few additional bits to be configured for SPM nodes
to enter sleep. Program additional bits to enable low power modes.

Change-Id: I1c35f0cea17a6ad6738249583bebf1bcab36989a
Signed-off-by: default avatarArchana Sathyakumar <asathyak@codeaurora.org>
parent 20059604

Documentation/devicetree/bindings/arm/msm/spm-v2.txt

+2 −0
Original line number Diff line number Diff line
@@ -64,6 +64,8 @@ only on SAW2 v3.0 and above. 
- qcom,use-qchannel-for-wfi: This boolean property is used to indicate

	that the SPM gets triggerd by the qchannel and not by means of

	wfi. So a wfe could trigger a spm for clock gating as well.

- qcom,pwr-state-dx: Indicates the power state idx of the core.

- qcom,wake-config: Indicate SPM wake up signal configuration.

- modes: Lists all the available low power modes for the device



Second level properties for modes

drivers/soc/qcom/spm_devices.c

+16 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2011-2016, The Linux Foundation. All rights reserved.

/* Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -33,6 +33,10 @@ 
#define EVENT_SYNC_BIT 24

#define ISAR_BIT 3

#define SPM_EN_BIT 0

#define PWR_STATE_IDX_BITS 20

#define PWR_STATE_IDX_MASK 0x07

#define WAKE_CONFIG_BITS 1

#define WAKE_CONFIG_MASK 0x03



struct msm_spm_power_modes {

	uint32_t mode;
@@ -874,6 +878,7 @@ static int msm_spm_dev_probe(struct platform_device *pdev) 
	for_each_child_of_node(node, n) {

		const char *name;

		bool bit_set;

		u8 field_val;

		int sync;



		if (!n->name)
@@ -915,6 +920,16 @@ static int msm_spm_dev_probe(struct platform_device *pdev) 
		bit_set = of_property_read_bool(n, "qcom,spm_en");

		modes[mode_count].ctl |= bit_set ? BIT(SPM_EN_BIT) : 0;



		ret  = of_property_read_u8(n, "qcom,pwr-state-idx", &field_val);

		if (!ret)

			modes[mode_count].ctl |= (field_val &

				PWR_STATE_IDX_MASK) << PWR_STATE_IDX_BITS;



		ret = of_property_read_u8(n, "qcom,wake-config", &field_val);

		if (!ret)

			modes[mode_count].ctl |= (field_val & WAKE_CONFIG_MASK)

				<< WAKE_CONFIG_BITS;



		ret = of_property_read_u32(n, "qcom,event_sync", &sync);

		if (!ret)

			modes[mode_count].ctl |= sync << EVENT_SYNC_BIT;