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Commit 5c008d70 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'next/soc2' into HEAD

parents 5d3a0a95 36246a82

arch/arm/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -485,7 +485,9 @@ config ARCH_MXS 
	select CLKSRC_MMIO

	select COMMON_CLK

	select HAVE_CLK_PREPARE

	select MULTI_IRQ_HANDLER

	select PINCTRL

	select SPARSE_IRQ

	select USE_OF

	help

	  Support for Freescale MXS-based family of processors

arch/arm/boot/dts/imx23.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ 
			ranges;



			icoll: interrupt-controller@80000000 {

				compatible = "fsl,imx23-icoll", "fsl,mxs-icoll";

				compatible = "fsl,imx23-icoll", "fsl,icoll";

				interrupt-controller;

				#interrupt-cells = <1>;

				reg = <0x80000000 0x2000>;
@@ -407,8 +407,9 @@ 
			};



			timrot@80068000 {

				compatible = "fsl,imx23-timrot", "fsl,timrot";

				reg = <0x80068000 0x2000>;

				status = "disabled";

				interrupts = <28 29 30 31>;

			};



			auart0: serial@8006c000 {

arch/arm/boot/dts/imx28.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@ 
			ranges;



			icoll: interrupt-controller@80000000 {

				compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";

				compatible = "fsl,imx28-icoll", "fsl,icoll";

				interrupt-controller;

				#interrupt-cells = <1>;

				reg = <0x80000000 0x2000>;
@@ -787,8 +787,9 @@ 
			};



			timrot@80068000 {

				compatible = "fsl,imx28-timrot", "fsl,timrot";

				reg = <0x80068000 0x2000>;

				status = "disabled";

				interrupts = <48 49 50 51>;

			};



			auart0: serial@8006a000 {

arch/arm/mach-mxs/icoll.c

+54 −9
Original line number Diff line number Diff line
@@ -19,20 +19,27 @@ 
#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/irq.h>

#include <linux/irqdomain.h>

#include <linux/io.h>



#include <linux/of.h>

#include <linux/of_irq.h>

#include <asm/exception.h>

#include <mach/mxs.h>

#include <mach/common.h>



#define HW_ICOLL_VECTOR				0x0000

#define HW_ICOLL_LEVELACK			0x0010

#define HW_ICOLL_CTRL				0x0020

#define HW_ICOLL_STAT_OFFSET			0x0070

#define HW_ICOLL_INTERRUPTn_SET(n)		(0x0124 + (n) * 0x10)

#define HW_ICOLL_INTERRUPTn_CLR(n)		(0x0128 + (n) * 0x10)

#define BM_ICOLL_INTERRUPTn_ENABLE		0x00000004

#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0	0x1



#define ICOLL_NUM_IRQS		128



static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR);

static struct irq_domain *icoll_domain;



static void icoll_ack_irq(struct irq_data *d)

{
@@ -48,13 +55,13 @@ static void icoll_ack_irq(struct irq_data *d) 
static void icoll_mask_irq(struct irq_data *d)

{

	__raw_writel(BM_ICOLL_INTERRUPTn_ENABLE,

			icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->irq));

			icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->hwirq));

}



static void icoll_unmask_irq(struct irq_data *d)

{

	__raw_writel(BM_ICOLL_INTERRUPTn_ENABLE,

			icoll_base + HW_ICOLL_INTERRUPTn_SET(d->irq));

			icoll_base + HW_ICOLL_INTERRUPTn_SET(d->hwirq));

}



static struct irq_chip mxs_icoll_chip = {
@@ -63,18 +70,56 @@ static struct irq_chip mxs_icoll_chip = { 
	.irq_unmask = icoll_unmask_irq,

};



void __init icoll_init_irq(void)

asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs)

{

	int i;

	u32 irqnr;



	do {

		irqnr = __raw_readl(icoll_base + HW_ICOLL_STAT_OFFSET);

		if (irqnr != 0x7f) {

			__raw_writel(irqnr, icoll_base + HW_ICOLL_VECTOR);

			irqnr = irq_find_mapping(icoll_domain, irqnr);

			handle_IRQ(irqnr, regs);

			continue;

		}

		break;

	} while (1);

}



static int icoll_irq_domain_map(struct irq_domain *d, unsigned int virq,

				irq_hw_number_t hw)

{

	irq_set_chip_and_handler(virq, &mxs_icoll_chip, handle_level_irq);

	set_irq_flags(virq, IRQF_VALID);



	return 0;

}



static struct irq_domain_ops icoll_irq_domain_ops = {

	.map = icoll_irq_domain_map,

	.xlate = irq_domain_xlate_onecell,

};



void __init icoll_of_init(struct device_node *np,

			  struct device_node *interrupt_parent)

{

	/*

	 * Interrupt Collector reset, which initializes the priority

	 * for each irq to level 0.

	 */

	mxs_reset_block(icoll_base + HW_ICOLL_CTRL);



	for (i = 0; i < MXS_INTERNAL_IRQS; i++) {

		irq_set_chip_and_handler(i, &mxs_icoll_chip, handle_level_irq);

		set_irq_flags(i, IRQF_VALID);

	icoll_domain = irq_domain_add_linear(np, ICOLL_NUM_IRQS,

					     &icoll_irq_domain_ops, NULL);

	WARN_ON(!icoll_domain);

}



static const struct of_device_id icoll_of_match[] __initconst = {

	{.compatible = "fsl,icoll", .data = icoll_of_init},

	{ /* sentinel */ }

};



void __init icoll_init_irq(void)

{

	of_irq_init(icoll_of_match);

}

arch/arm/mach-mxs/include/mach/common.h

+2 −1
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ 


extern const u32 *mxs_get_ocotp(void);

extern int mxs_reset_block(void __iomem *);

extern void mxs_timer_init(int);

extern void mxs_timer_init(void);

extern void mxs_restart(char, const char *);

extern int mxs_saif_clkmux_select(unsigned int clkmux);
@@ -24,5 +24,6 @@ extern int mx28_clocks_init(void); 
extern void mx28_map_io(void);



extern void icoll_init_irq(void);

extern void icoll_handle_irq(struct pt_regs *);



#endif /* __MACH_MXS_COMMON_H__ */