Loading Documentation/devicetree/bindings/sound/fsl,spdif.txt 0 → 100644 +54 −0 Original line number Diff line number Diff line Freescale Sony/Philips Digital Interface Format (S/PDIF) Controller The Freescale S/PDIF audio block is a stereo transceiver that allows the processor to receive and transmit digital audio via an coaxial cable or a fibre cable. Required properties: - compatible : Compatible list, must contain "fsl,imx35-spdif". - reg : Offset and length of the register set for the device. - interrupts : Contains the spdif interrupt. - dmas : Generic dma devicetree binding as described in Documentation/devicetree/bindings/dma/dma.txt. - dma-names : Two dmas have to be defined, "tx" and "rx". - clocks : Contains an entry for each entry in clock-names. - clock-names : Includes the following entries: "core" The core clock of spdif controller "rxtx<0-7>" Clock source list for tx and rx clock. This clock list should be identical to the source list connecting to the spdif clock mux in "SPDIF Transceiver Clock Diagram" of SoC reference manual. It can also be referred to TxClk_Source bit of register SPDIF_STC. Example: spdif: spdif@02004000 { compatible = "fsl,imx35-spdif"; reg = <0x02004000 0x4000>; interrupts = <0 52 0x04>; dmas = <&sdma 14 18 0>, <&sdma 15 18 0>; dma-names = "rx", "tx"; clocks = <&clks 197>, <&clks 3>, <&clks 197>, <&clks 107>, <&clks 0>, <&clks 118>, <&clks 62>, <&clks 139>, <&clks 0>; clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", "rxtx4", "rxtx5", "rxtx6", "rxtx7"; status = "okay"; }; Documentation/devicetree/bindings/powerpc/fsl/ssi.txt→Documentation/devicetree/bindings/sound/fsl,ssi.txt +12 −0 Original line number Diff line number Diff line Loading @@ -43,10 +43,22 @@ Required properties: together. This would still allow different sample sizes, but not different sample rates. Required are also ac97 link bindings if ac97 is used. See Documentation/devicetree/bindings/sound/soc-ac97link.txt for the necessary bindings. Optional properties: - codec-handle: Phandle to a 'codec' node that defines an audio codec connected to this SSI. This node is typically a child of an I2C or other control node. - fsl,fiq-stream-filter: Bool property. Disabled DMA and use FIQ instead to filter the codec stream. This is necessary for some boards where an incompatible codec is connected to this SSI, e.g. on pca100 and pcm043. - dmas: Generic dma devicetree binding as described in Documentation/devicetree/bindings/dma/dma.txt. - dma-names: Two dmas have to be defined, "tx" and "rx", if fsl,imx-fiq is not defined. Child 'codec' node required properties: - compatible: Compatible list, contains the name of the codec Loading Documentation/devicetree/bindings/sound/imx-audmux.txt +9 −0 Original line number Diff line number Diff line Loading @@ -5,6 +5,15 @@ Required properties: or "fsl,imx31-audmux" for the version firstly used on i.MX31. - reg : Should contain AUDMUX registers location and length An initial configuration can be setup using child nodes. Required properties of optional child nodes: - fsl,audmux-port : Integer of the audmux port that is configured by this child node. - fsl,port-config : List of configuration options for the specific port. For imx31-audmux and above, it is a list of tuples <ptcr pdcr>. For imx21-audmux it is a list of pcr values. Example: audmux@021d8000 { Loading include/dt-bindings/sound/fsl-imx-audmux.h 0 → 100644 +56 −0 Original line number Diff line number Diff line #ifndef __DT_FSL_IMX_AUDMUX_H #define __DT_FSL_IMX_AUDMUX_H #define MX27_AUDMUX_HPCR1_SSI0 0 #define MX27_AUDMUX_HPCR2_SSI1 1 #define MX27_AUDMUX_HPCR3_SSI_PINS_4 2 #define MX27_AUDMUX_PPCR1_SSI_PINS_1 3 #define MX27_AUDMUX_PPCR2_SSI_PINS_2 4 #define MX27_AUDMUX_PPCR3_SSI_PINS_3 5 #define MX31_AUDMUX_PORT1_SSI0 0 #define MX31_AUDMUX_PORT2_SSI1 1 #define MX31_AUDMUX_PORT3_SSI_PINS_3 2 #define MX31_AUDMUX_PORT4_SSI_PINS_4 3 #define MX31_AUDMUX_PORT5_SSI_PINS_5 4 #define MX31_AUDMUX_PORT6_SSI_PINS_6 5 #define MX31_AUDMUX_PORT7_SSI_PINS_7 6 #define MX51_AUDMUX_PORT1_SSI0 0 #define MX51_AUDMUX_PORT2_SSI1 1 #define MX51_AUDMUX_PORT3 2 #define MX51_AUDMUX_PORT4 3 #define MX51_AUDMUX_PORT5 4 #define MX51_AUDMUX_PORT6 5 #define MX51_AUDMUX_PORT7 6 /* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) #define IMX_AUDMUX_V1_PCR_INMEN (1 << 8) #define IMX_AUDMUX_V1_PCR_TXRXEN (1 << 10) #define IMX_AUDMUX_V1_PCR_SYN (1 << 12) #define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) #define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) #define IMX_AUDMUX_V1_PCR_RCLKDIR (1 << 24) #define IMX_AUDMUX_V1_PCR_RFSDIR (1 << 25) #define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) #define IMX_AUDMUX_V1_PCR_TCLKDIR (1 << 30) #define IMX_AUDMUX_V1_PCR_TFSDIR (1 << 31) /* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */ #define IMX_AUDMUX_V2_PTCR_TFSDIR (1 << 31) #define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) #define IMX_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) #define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) #define IMX_AUDMUX_V2_PTCR_RFSDIR (1 << 21) #define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) #define IMX_AUDMUX_V2_PTCR_RCLKDIR (1 << 16) #define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) #define IMX_AUDMUX_V2_PTCR_SYN (1 << 11) #define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) #define IMX_AUDMUX_V2_PDCR_TXRXEN (1 << 12) #define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) #define IMX_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff) #endif /* __DT_FSL_IMX_AUDMUX_H */ sound/soc/fsl/Kconfig +7 −6 Original line number Diff line number Diff line config SND_SOC_FSL_SSI tristate config SND_SOC_FSL_SPDIF tristate config SND_SOC_FSL_UTILS tristate Loading Loading @@ -98,7 +101,7 @@ endif # SND_POWERPC_SOC menuconfig SND_IMX_SOC tristate "SoC Audio for Freescale i.MX CPUs" depends on ARCH_MXC depends on ARCH_MXC || COMPILE_TEST help Say Y or M if you want to add support for codecs attached to the i.MX CPUs. Loading @@ -109,11 +112,11 @@ config SND_SOC_IMX_SSI tristate config SND_SOC_IMX_PCM_FIQ bool tristate select FIQ config SND_SOC_IMX_PCM_DMA bool tristate select SND_SOC_GENERIC_DMAENGINE_PCM config SND_SOC_IMX_AUDMUX Loading Loading @@ -175,7 +178,6 @@ config SND_SOC_IMX_WM8962 select SND_SOC_IMX_PCM_DMA select SND_SOC_IMX_AUDMUX select SND_SOC_FSL_SSI select SND_SOC_FSL_UTILS help Say Y if you want to add support for SoC audio on an i.MX board with a wm8962 codec. Loading @@ -187,14 +189,13 @@ config SND_SOC_IMX_SGTL5000 select SND_SOC_IMX_PCM_DMA select SND_SOC_IMX_AUDMUX select SND_SOC_FSL_SSI select SND_SOC_FSL_UTILS help Say Y if you want to add support for SoC audio on an i.MX board with a sgtl5000 codec. config SND_SOC_IMX_MC13783 tristate "SoC Audio support for I.MX boards with mc13783" depends on MFD_MC13783 depends on MFD_MC13783 && ARM select SND_SOC_IMX_SSI select SND_SOC_IMX_AUDMUX select SND_SOC_MC13783 Loading Loading
Documentation/devicetree/bindings/sound/fsl,spdif.txt 0 → 100644 +54 −0 Original line number Diff line number Diff line Freescale Sony/Philips Digital Interface Format (S/PDIF) Controller The Freescale S/PDIF audio block is a stereo transceiver that allows the processor to receive and transmit digital audio via an coaxial cable or a fibre cable. Required properties: - compatible : Compatible list, must contain "fsl,imx35-spdif". - reg : Offset and length of the register set for the device. - interrupts : Contains the spdif interrupt. - dmas : Generic dma devicetree binding as described in Documentation/devicetree/bindings/dma/dma.txt. - dma-names : Two dmas have to be defined, "tx" and "rx". - clocks : Contains an entry for each entry in clock-names. - clock-names : Includes the following entries: "core" The core clock of spdif controller "rxtx<0-7>" Clock source list for tx and rx clock. This clock list should be identical to the source list connecting to the spdif clock mux in "SPDIF Transceiver Clock Diagram" of SoC reference manual. It can also be referred to TxClk_Source bit of register SPDIF_STC. Example: spdif: spdif@02004000 { compatible = "fsl,imx35-spdif"; reg = <0x02004000 0x4000>; interrupts = <0 52 0x04>; dmas = <&sdma 14 18 0>, <&sdma 15 18 0>; dma-names = "rx", "tx"; clocks = <&clks 197>, <&clks 3>, <&clks 197>, <&clks 107>, <&clks 0>, <&clks 118>, <&clks 62>, <&clks 139>, <&clks 0>; clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", "rxtx4", "rxtx5", "rxtx6", "rxtx7"; status = "okay"; };
Documentation/devicetree/bindings/powerpc/fsl/ssi.txt→Documentation/devicetree/bindings/sound/fsl,ssi.txt +12 −0 Original line number Diff line number Diff line Loading @@ -43,10 +43,22 @@ Required properties: together. This would still allow different sample sizes, but not different sample rates. Required are also ac97 link bindings if ac97 is used. See Documentation/devicetree/bindings/sound/soc-ac97link.txt for the necessary bindings. Optional properties: - codec-handle: Phandle to a 'codec' node that defines an audio codec connected to this SSI. This node is typically a child of an I2C or other control node. - fsl,fiq-stream-filter: Bool property. Disabled DMA and use FIQ instead to filter the codec stream. This is necessary for some boards where an incompatible codec is connected to this SSI, e.g. on pca100 and pcm043. - dmas: Generic dma devicetree binding as described in Documentation/devicetree/bindings/dma/dma.txt. - dma-names: Two dmas have to be defined, "tx" and "rx", if fsl,imx-fiq is not defined. Child 'codec' node required properties: - compatible: Compatible list, contains the name of the codec Loading
Documentation/devicetree/bindings/sound/imx-audmux.txt +9 −0 Original line number Diff line number Diff line Loading @@ -5,6 +5,15 @@ Required properties: or "fsl,imx31-audmux" for the version firstly used on i.MX31. - reg : Should contain AUDMUX registers location and length An initial configuration can be setup using child nodes. Required properties of optional child nodes: - fsl,audmux-port : Integer of the audmux port that is configured by this child node. - fsl,port-config : List of configuration options for the specific port. For imx31-audmux and above, it is a list of tuples <ptcr pdcr>. For imx21-audmux it is a list of pcr values. Example: audmux@021d8000 { Loading
include/dt-bindings/sound/fsl-imx-audmux.h 0 → 100644 +56 −0 Original line number Diff line number Diff line #ifndef __DT_FSL_IMX_AUDMUX_H #define __DT_FSL_IMX_AUDMUX_H #define MX27_AUDMUX_HPCR1_SSI0 0 #define MX27_AUDMUX_HPCR2_SSI1 1 #define MX27_AUDMUX_HPCR3_SSI_PINS_4 2 #define MX27_AUDMUX_PPCR1_SSI_PINS_1 3 #define MX27_AUDMUX_PPCR2_SSI_PINS_2 4 #define MX27_AUDMUX_PPCR3_SSI_PINS_3 5 #define MX31_AUDMUX_PORT1_SSI0 0 #define MX31_AUDMUX_PORT2_SSI1 1 #define MX31_AUDMUX_PORT3_SSI_PINS_3 2 #define MX31_AUDMUX_PORT4_SSI_PINS_4 3 #define MX31_AUDMUX_PORT5_SSI_PINS_5 4 #define MX31_AUDMUX_PORT6_SSI_PINS_6 5 #define MX31_AUDMUX_PORT7_SSI_PINS_7 6 #define MX51_AUDMUX_PORT1_SSI0 0 #define MX51_AUDMUX_PORT2_SSI1 1 #define MX51_AUDMUX_PORT3 2 #define MX51_AUDMUX_PORT4 3 #define MX51_AUDMUX_PORT5 4 #define MX51_AUDMUX_PORT6 5 #define MX51_AUDMUX_PORT7 6 /* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) #define IMX_AUDMUX_V1_PCR_INMEN (1 << 8) #define IMX_AUDMUX_V1_PCR_TXRXEN (1 << 10) #define IMX_AUDMUX_V1_PCR_SYN (1 << 12) #define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) #define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) #define IMX_AUDMUX_V1_PCR_RCLKDIR (1 << 24) #define IMX_AUDMUX_V1_PCR_RFSDIR (1 << 25) #define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) #define IMX_AUDMUX_V1_PCR_TCLKDIR (1 << 30) #define IMX_AUDMUX_V1_PCR_TFSDIR (1 << 31) /* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */ #define IMX_AUDMUX_V2_PTCR_TFSDIR (1 << 31) #define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) #define IMX_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) #define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) #define IMX_AUDMUX_V2_PTCR_RFSDIR (1 << 21) #define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) #define IMX_AUDMUX_V2_PTCR_RCLKDIR (1 << 16) #define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) #define IMX_AUDMUX_V2_PTCR_SYN (1 << 11) #define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) #define IMX_AUDMUX_V2_PDCR_TXRXEN (1 << 12) #define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) #define IMX_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff) #endif /* __DT_FSL_IMX_AUDMUX_H */
sound/soc/fsl/Kconfig +7 −6 Original line number Diff line number Diff line config SND_SOC_FSL_SSI tristate config SND_SOC_FSL_SPDIF tristate config SND_SOC_FSL_UTILS tristate Loading Loading @@ -98,7 +101,7 @@ endif # SND_POWERPC_SOC menuconfig SND_IMX_SOC tristate "SoC Audio for Freescale i.MX CPUs" depends on ARCH_MXC depends on ARCH_MXC || COMPILE_TEST help Say Y or M if you want to add support for codecs attached to the i.MX CPUs. Loading @@ -109,11 +112,11 @@ config SND_SOC_IMX_SSI tristate config SND_SOC_IMX_PCM_FIQ bool tristate select FIQ config SND_SOC_IMX_PCM_DMA bool tristate select SND_SOC_GENERIC_DMAENGINE_PCM config SND_SOC_IMX_AUDMUX Loading Loading @@ -175,7 +178,6 @@ config SND_SOC_IMX_WM8962 select SND_SOC_IMX_PCM_DMA select SND_SOC_IMX_AUDMUX select SND_SOC_FSL_SSI select SND_SOC_FSL_UTILS help Say Y if you want to add support for SoC audio on an i.MX board with a wm8962 codec. Loading @@ -187,14 +189,13 @@ config SND_SOC_IMX_SGTL5000 select SND_SOC_IMX_PCM_DMA select SND_SOC_IMX_AUDMUX select SND_SOC_FSL_SSI select SND_SOC_FSL_UTILS help Say Y if you want to add support for SoC audio on an i.MX board with a sgtl5000 codec. config SND_SOC_IMX_MC13783 tristate "SoC Audio support for I.MX boards with mc13783" depends on MFD_MC13783 depends on MFD_MC13783 && ARM select SND_SOC_IMX_SSI select SND_SOC_IMX_AUDMUX select SND_SOC_MC13783 Loading