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Commit 5bd7a2a3 authored by Ingrid Gallardo's avatar Ingrid Gallardo Committed by Ujwal Patel
Browse files

msm: mdss: adjust per pipe qos settings 



Adjust per pipe qos settings as per
recommendation.

Change-Id: Iec3eefdfbd15ee33607c5fcb0096ae4bf79a24e2
Signed-off-by: default avatarIngrid Gallardo <ingridg@codeaurora.org>
parent b165e058

Documentation/devicetree/bindings/fb/mdss-mdp.txt

+10 −2
Original line number Diff line number Diff line
@@ -476,8 +476,11 @@ Fudge Factors: Fudge factors are used to boost demand for 
				each rt and nrt clients. This property is

				for the MDPv1.7 and above, which configures

				the panic independently on each client.

				First element on the array is for the panic

				configuration, second element for robust.

				Each element of the array corresponds to:

				First element - panic for linear formats

				Second element - panic for tile formats

				Third element - robust for linear formats

				Fourth element - robust for tile formats

- qcom,mdss-has-pingpong-split:	Boolean property to indicate if destination

				split feature is available or not in the target.

- qcom,mdss-slave-pingpong-off:	Offset address for the extra TE block which needs
@@ -694,6 +697,11 @@ Example: 
		qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x3AC 8 12>,

						      <0x3B4 8 12>;



		qcom,mdss-per-pipe-panic-luts = <0x000f>,

						<0xffff>,

						<0xfffc>,

						<0xff00>;



		qcom,mdss-has-panic-ctrl;

		qcom,mdss-pipe-vig-panic-ctrl-offsets = <0 1 2 3>;

		qcom,mdss-pipe-rgb-panic-ctrl-offsets = <4 5 6 7>;

drivers/video/msm/mdss/mdss.h

+5 −2
Original line number Diff line number Diff line
@@ -263,8 +263,10 @@ struct mdss_data_type { 
	u32 default_robust_lut;



	/* values used when HW has panic/robust LUTs per pipe */

	u32 default_panic_lut_per_pipe;

	u32 default_robust_lut_per_pipe;

	u32 default_panic_lut_per_pipe_linear;

	u32 default_panic_lut_per_pipe_tile;

	u32 default_robust_lut_per_pipe_linear;

	u32 default_robust_lut_per_pipe_tile;



	u32 has_decimation;

	bool has_fixed_qos_arbiter_enabled;
@@ -300,6 +302,7 @@ struct mdss_data_type { 
	u32 smp_mb_cnt;

	u32 smp_mb_size;

	u32 smp_mb_per_pipe;

	u32 pixel_ram_size;



	u32 rot_block_size;

drivers/video/msm/mdss/mdss_mdp.c

+10 −8
Original line number Diff line number Diff line
@@ -1192,6 +1192,7 @@ static void mdss_mdp_hw_rev_caps_init(struct mdss_data_type *mdata) 
	mdata->min_prefill_lines = 0xffff;

	/* clock gating feature is disabled by default */

	mdata->enable_gate = true;

	mdata->pixel_ram_size = 0;



	mdss_mdp_hw_rev_debug_caps_init(mdata);
@@ -1211,6 +1212,7 @@ static void mdss_mdp_hw_rev_caps_init(struct mdss_data_type *mdata) 
		mdata->hflip_buffer_reused = false;

		mdata->min_prefill_lines = 21;

		mdata->has_ubwc = true;

		mdata->pixel_ram_size = 50 * 1024;

		set_bit(MDSS_QOS_PER_PIPE_IB, mdata->mdss_qos_map);

		set_bit(MDSS_QOS_OVERHEAD_FACTOR, mdata->mdss_qos_map);

		set_bit(MDSS_QOS_CDP, mdata->mdss_qos_map);
@@ -1321,8 +1323,6 @@ void mdss_hw_init(struct mdss_data_type *mdata) 
	mdata->nmax_concurrent_ad_hw =

		(mdata->mdp_rev < MDSS_MDP_HW_REV_103) ? 1 : 2;



	mdss_mdp_config_pipe_panic_lut(mdata);



	pr_debug("MDP hw init done\n");

}
@@ -2118,7 +2118,7 @@ static int mdss_mdp_parse_dt_pipe(struct platform_device *pdev) 
	u32 nfids = 0, setup_cnt = 0, len, nxids = 0;

	u32 *offsets = NULL, *ftch_id = NULL, *xin_id = NULL;

	u32 sw_reset_offset = 0;

	u32 data[2];

	u32 data[4];



	struct mdss_data_type *mdata = platform_get_drvdata(pdev);
@@ -2370,15 +2370,17 @@ static int mdss_mdp_parse_dt_pipe(struct platform_device *pdev) 
	}



	len = mdss_mdp_parse_dt_prop_len(pdev, "qcom,mdss-per-pipe-panic-luts");

	if (len != 2) {

	if (len != 4) {

		pr_debug("Unable to read per-pipe-panic-luts\n");

	} else {

		rc = mdss_mdp_parse_dt_handler(pdev,

			"qcom,mdss-per-pipe-panic-luts", data, len);

		mdata->default_panic_lut_per_pipe = data[0];

		mdata->default_robust_lut_per_pipe = data[1];

		pr_debug("per pipe panic lut [0]:0x%x [1]:0x%x\n",

			data[0], data[1]);

		mdata->default_panic_lut_per_pipe_linear = data[0];

		mdata->default_panic_lut_per_pipe_tile = data[1];

		mdata->default_robust_lut_per_pipe_linear = data[2];

		mdata->default_robust_lut_per_pipe_tile = data[3];

		pr_debug("per pipe panic lut [0]:0x%x [1]:0x%x [2]:0x%x [3]:0x%x\n",

			data[0], data[1], data[2], data[3]);

	}



	if (mdata->ncursor_pipes) {

drivers/video/msm/mdss/mdss_mdp.h

+0 −9
Original line number Diff line number Diff line
@@ -29,7 +29,6 @@ 
#include "mdss_mdp_cdm.h"



#define MDSS_MDP_DEFAULT_INTR_MASK 0

#define MDSS_MDP_PIXEL_RAM_SIZE (50 * 1024)



#define PHASE_STEP_SHIFT	21

#define PHASE_STEP_UNIT_SCALE   ((int) (1 << PHASE_STEP_SHIFT))
@@ -871,13 +870,6 @@ static inline int mdss_mdp_get_wb_ctl_support(struct mdss_data_type *mdata, 
				(mdata->nctl - mdata->nwb);

}



static inline int mdss_mdp_get_pixel_ram_size(struct mdss_data_type *mdata)

{

	return (IS_MDSS_MAJOR_MINOR_SAME(mdata->mdp_rev,

				MDSS_MDP_HW_REV_107)) ?

						MDSS_MDP_PIXEL_RAM_SIZE : 0;

}



static inline bool mdss_mdp_is_nrt_vbif_client(struct mdss_data_type *mdata,

					struct mdss_mdp_pipe *pipe)

{
@@ -1222,7 +1214,6 @@ int mdss_mdp_wb_addr_setup(struct mdss_data_type *mdata, 
void mdss_mdp_pipe_clk_force_off(struct mdss_mdp_pipe *pipe);

int mdss_mdp_pipe_fetch_halt(struct mdss_mdp_pipe *pipe);

int mdss_mdp_pipe_panic_signal_ctrl(struct mdss_mdp_pipe *pipe, bool enable);

void mdss_mdp_config_pipe_panic_lut(struct mdss_data_type *mdata);

void mdss_mdp_bwcpanic_ctrl(struct mdss_data_type *mdata, bool enable);

int mdss_mdp_pipe_destroy(struct mdss_mdp_pipe *pipe);

int mdss_mdp_pipe_queue_data(struct mdss_mdp_pipe *pipe,

drivers/video/msm/mdss/mdss_mdp_pipe.c

+112 −60
Original line number Diff line number Diff line
@@ -35,10 +35,9 @@ 
/* following offsets are relative to status register bit offset */

#define CLK_STATUS_OFFSET	0x0



#define QOS_LUT_WFD_READ	0x0

#define QOS_LUT_UBWC		0x55AAFF

#define QOS_LUT_420_CHROMA	0x555557

#define QOS_LUT_LINEAR		0x55555B

#define QOS_LUT_NRT_READ	0x0

#define PANIC_LUT_NRT_READ	0x0

#define ROBUST_LUT_NRT_READ	0xFFFF



/* Priority 2, no panic */

#define VBLANK_PANIC_DEFAULT_CONFIG 0x200000
@@ -68,26 +67,97 @@ static inline u32 mdss_mdp_pipe_read(struct mdss_mdp_pipe *pipe, u32 reg) 
	return readl_relaxed(pipe->base + reg);

}



static inline int mdss_calc_fill_level(struct mdss_mdp_format_params *fmt,

	u32 src_width)

{

	struct mdss_data_type *mdata = mdss_mdp_get_mdata();

	u32 fixed_buff_size = mdata->pixel_ram_size;

	u32 total_fl;



	if (fmt->fetch_planes == MDSS_MDP_PLANE_PSEUDO_PLANAR) {

		if (fmt->chroma_sample == MDSS_MDP_CHROMA_420) {

			/* NV12 */

			total_fl = (fixed_buff_size / 2) /

				((src_width + 32) * fmt->bpp);

		} else {

			/* non NV12 */

			total_fl = (fixed_buff_size) /

				((src_width + 32) * fmt->bpp);

		}

	} else {

		total_fl = (fixed_buff_size * 2) /

			((src_width + 32) * fmt->bpp);

	}



	return total_fl;

}



static inline u32 get_qos_lut_linear(u32 total_fl)

{

	u32 qos_lut;



	if (total_fl <= 4)

		qos_lut = 0x1B;

	else if (total_fl <= 5)

		qos_lut = 0x5B;

	else if (total_fl <= 6)

		qos_lut = 0x15B;

	else if (total_fl <= 7)

		qos_lut = 0x55B;

	else if (total_fl <= 8)

		qos_lut = 0x155B;

	else if (total_fl <= 9)

		qos_lut = 0x555B;

	else if (total_fl <= 10)

		qos_lut = 0x1555B;

	else if (total_fl <= 11)

		qos_lut = 0x5555B;

	else if (total_fl <= 12)

		qos_lut = 0x15555B;

	else

		qos_lut = 0x55555B;



	return qos_lut;

}



static inline u32 get_qos_lut_macrotile(u32 total_fl)

{

	u32 qos_lut;



	if (total_fl <= 10)

		qos_lut = 0x1AAff;

	else if (total_fl <= 11)

		qos_lut = 0x5AAFF;

	else if (total_fl <= 12)

		qos_lut = 0x15AAFF;

	else

		qos_lut = 0x55AAFF;



	return qos_lut;

}



int mdss_mdp_pipe_qos_lut(struct mdss_mdp_pipe *pipe)

{

	struct mdss_mdp_ctl *ctl = pipe->mixer_left->ctl;

	u32 qos_lut;

	u32 total_fl = 0;



	if ((ctl->intf_num == MDSS_MDP_NO_INTF) ||

			pipe->mixer_left->rotator_mode) {

		qos_lut = QOS_LUT_NRT_READ; /* low priority for nrt */

	} else {

		total_fl = mdss_calc_fill_level(pipe->src_fmt,

			pipe->src.w);



	if ((ctl->intf_num == MDSS_MDP_NO_INTF) &&

			!pipe->mixer_left->rotator_mode)

		qos_lut = QOS_LUT_WFD_READ; /* low priority for nrt wfd */

	else if (mdss_mdp_is_ubwc_format(pipe->src_fmt))

		qos_lut = QOS_LUT_UBWC;

	else if ((pipe->src_fmt->chroma_sample == MDSS_MDP_CHROMA_420) ||

			(pipe->src_fmt->fetch_planes ==

			MDSS_MDP_PLANE_PSEUDO_PLANAR))

		qos_lut = QOS_LUT_420_CHROMA; /* nv12 and planar 420 */

		if (mdss_mdp_is_linear_format(pipe->src_fmt))

			qos_lut = get_qos_lut_linear(total_fl);

		else

		qos_lut = QOS_LUT_LINEAR; /* rest of the linear formats */

			qos_lut = get_qos_lut_macrotile(total_fl);

	}



	pr_debug("lut:0x%x wfd:%d\n", qos_lut,

		((ctl->intf_num == MDSS_MDP_NO_INTF) &&

		!pipe->mixer_left->rotator_mode));

	pr_debug("pnum:%d fmt:%d intf:%d rot:%d fl:%d lut:0x%x\n",

		pipe->num, pipe->src_fmt->format, ctl->intf_num,

		pipe->mixer_left->rotator_mode, total_fl, qos_lut);



	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);

	mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_CREQ_LUT,
@@ -103,52 +173,30 @@ bool is_rt_pipe(struct mdss_mdp_pipe *pipe) 
		pipe->mixer_left->type == MDSS_MDP_MIXER_TYPE_INTF;

}



void mdss_mdp_config_pipe_panic_lut(struct mdss_data_type *mdata)

static void mdss_mdp_config_pipe_panic_lut(struct mdss_mdp_pipe *pipe)

{

	u32 panic_lut, robust_lut;

	struct mdss_mdp_pipe *pipe;

	int i;



	if ((mdss_mdp_panic_signal_support_mode(mdata) ==

			MDSS_MDP_PANIC_PER_PIPE_CFG) &&

			(mdata->default_panic_lut_per_pipe > 0) &&

			(mdata->default_robust_lut_per_pipe > 0)) {



		panic_lut = mdata->default_panic_lut_per_pipe;

		robust_lut = mdata->default_robust_lut_per_pipe;



		for (i = 0; i < mdata->nvig_pipes; i++) {

			pipe = &mdata->vig_pipes[i];

			mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_DANGER_LUT,

				panic_lut);

			mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SAFE_LUT,

				robust_lut);

		}

	struct mdss_data_type *mdata = mdss_mdp_get_mdata();



		for (i = 0; i < mdata->nrgb_pipes; i++) {

			pipe = &mdata->rgb_pipes[i];

			mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_DANGER_LUT,

				panic_lut);

			mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SAFE_LUT,

				robust_lut);

	if (!is_rt_pipe(pipe)) {

		panic_lut = PANIC_LUT_NRT_READ;

		robust_lut = ROBUST_LUT_NRT_READ;

	} else if (mdss_mdp_is_linear_format(pipe->src_fmt)) {

		panic_lut = mdata->default_panic_lut_per_pipe_linear;

		robust_lut = mdata->default_robust_lut_per_pipe_linear;

	} else {

		panic_lut = mdata->default_panic_lut_per_pipe_tile;

		robust_lut = mdata->default_robust_lut_per_pipe_tile;

	}



		for (i = 0; i < mdata->ndma_pipes; i++) {

			pipe = &mdata->dma_pipes[i];

	mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_DANGER_LUT,

		panic_lut);

	mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SAFE_LUT,

		robust_lut);

		}



		for (i = 0; i < mdata->ncursor_pipes; i++) {

			pipe = &mdata->cursor_pipes[i];

			mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_DANGER_LUT,

				panic_lut);

			mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SAFE_LUT,

				robust_lut);

		}

	}

	pr_debug("pnum:%d fmt:%d mode:%d luts[0x%x, 0x%x]\n",

		pipe->num, pipe->src_fmt->format, pipe->src_fmt->fetch_mode,

		panic_lut, robust_lut);

}



/**
@@ -431,7 +479,7 @@ u32 mdss_mdp_smp_get_size(struct mdss_mdp_pipe *pipe) 
	struct mdss_data_type *mdata = mdss_mdp_get_mdata();



	if (mdata->has_pixel_ram) {

		smp_size = mdss_mdp_get_pixel_ram_size(mdata);

		smp_size = mdata->pixel_ram_size;

	} else {

		for (i = 0; i < MAX_PLANES; i++) {

			mb_cnt += bitmap_weight(pipe->smp_map[i].allocated,
@@ -2186,6 +2234,10 @@ int mdss_mdp_pipe_queue_data(struct mdss_mdp_pipe *pipe, 
		if (test_bit(MDSS_QOS_PER_PIPE_LUT, mdata->mdss_qos_map))

			mdss_mdp_pipe_qos_lut(pipe);



		if (mdss_mdp_panic_signal_support_mode(mdata) ==

				MDSS_MDP_PANIC_PER_PIPE_CFG)

			mdss_mdp_config_pipe_panic_lut(pipe);



		if (pipe->type != MDSS_MDP_PIPE_TYPE_CURSOR) {

			mdss_mdp_pipe_panic_vblank_signal_ctrl(pipe, true);

			mdss_mdp_pipe_panic_signal_ctrl(pipe, true);