Loading arch/arm/kernel/module.c +2 −0 Original line number Diff line number Diff line Loading @@ -101,6 +101,8 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, break; case R_ARM_PC24: case R_ARM_CALL: case R_ARM_JUMP24: offset = (*(u32 *)loc & 0x00ffffff) << 2; if (offset & 0x02000000) offset -= 0x04000000; Loading arch/arm/mach-pxa/pm.c +5 −4 Original line number Diff line number Diff line Loading @@ -155,19 +155,20 @@ int pxa_pm_enter(suspend_state_t state) PSPR = 0; /* restore registers */ RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2); RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); RESTORE(GAFR0_L); RESTORE(GAFR0_U); RESTORE(GAFR1_L); RESTORE(GAFR1_U); RESTORE(GAFR2_L); RESTORE(GAFR2_U); RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2); RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2); RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2); RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); #ifdef CONFIG_PXA27x RESTORE(MDREFR); RESTORE(GAFR3_L); RESTORE(GAFR3_U); RESTORE_GPLEVEL(3); RESTORE(GPDR3); RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3); RESTORE_GPLEVEL(3); RESTORE(GPDR3); RESTORE(GAFR3_L); RESTORE(GAFR3_U); RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3); RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER); RESTORE(PFER); RESTORE(PKWR); #endif Loading arch/ia64/kernel/process.c +2 −0 Original line number Diff line number Diff line Loading @@ -721,11 +721,13 @@ flush_thread (void) /* drop floating-point and debug-register state if it exists: */ current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID); ia64_drop_fpu(current); #ifdef CONFIG_IA32_SUPPORT if (IS_IA32_PROCESS(ia64_task_regs(current))) { ia32_drop_partial_page_list(current); current->thread.task_size = IA32_PAGE_OFFSET; set_fs(USER_DS); } #endif } /* Loading drivers/ide/Kconfig +1 −9 Original line number Diff line number Diff line Loading @@ -807,14 +807,6 @@ config BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX endchoice config BLK_DEV_IDE_AU1XXX_BURSTABLE_ON bool "Enable burstable Mode on DbDMA" default false depends BLK_DEV_IDE_AU1XXX help This option enable the burstable Flag on DbDMA controller (cf. "AMD Alchemy 'Au1200' Processor Data Book - PRELIMINARY"). config BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ int "Maximum transfer size (KB) per request (up to 128)" default "128" Loading Loading @@ -940,7 +932,7 @@ config BLK_DEV_Q40IDE config BLK_DEV_MPC8xx_IDE bool "MPC8xx IDE support" depends on 8xx depends on 8xx && IDE=y && BLK_DEV_IDE=y help This option provides support for IDE on Motorola MPC8xx Systems. Please see 'Type of MPC8xx IDE interface' for details. Loading drivers/ide/ide-cd.c +0 −7 Original line number Diff line number Diff line Loading @@ -1292,7 +1292,6 @@ static ide_startstop_t cdrom_start_seek (ide_drive_t *drive, unsigned int block) struct cdrom_info *info = drive->driver_data; info->dma = 0; info->cmd = 0; info->start_seek = jiffies; return cdrom_start_packet_command(drive, 0, cdrom_start_seek_continuation); } Loading Loading @@ -1344,8 +1343,6 @@ static ide_startstop_t cdrom_start_read (ide_drive_t *drive, unsigned int block) (rq->nr_sectors & (sectors_per_frame - 1))) info->dma = 0; info->cmd = READ; /* Start sending the read request to the drive. */ return cdrom_start_packet_command(drive, 32768, cdrom_start_read_continuation); } Loading Loading @@ -1484,7 +1481,6 @@ static ide_startstop_t cdrom_do_packet_command (ide_drive_t *drive) struct cdrom_info *info = drive->driver_data; info->dma = 0; info->cmd = 0; rq->flags &= ~REQ_FAILED; len = rq->data_len; Loading Loading @@ -1891,7 +1887,6 @@ static ide_startstop_t cdrom_start_write(ide_drive_t *drive, struct request *rq) /* use dma, if possible. we don't need to check more, since we * know that the transfer is always (at least!) frame aligned */ info->dma = drive->using_dma ? 1 : 0; info->cmd = WRITE; info->devinfo.media_written = 1; Loading @@ -1916,7 +1911,6 @@ static ide_startstop_t cdrom_do_block_pc(ide_drive_t *drive, struct request *rq) rq->flags |= REQ_QUIET; info->dma = 0; info->cmd = 0; /* * sg request Loading @@ -1925,7 +1919,6 @@ static ide_startstop_t cdrom_do_block_pc(ide_drive_t *drive, struct request *rq) int mask = drive->queue->dma_alignment; unsigned long addr = (unsigned long) page_address(bio_page(rq->bio)); info->cmd = rq_data_dir(rq); info->dma = drive->using_dma; /* Loading Loading
arch/arm/kernel/module.c +2 −0 Original line number Diff line number Diff line Loading @@ -101,6 +101,8 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, break; case R_ARM_PC24: case R_ARM_CALL: case R_ARM_JUMP24: offset = (*(u32 *)loc & 0x00ffffff) << 2; if (offset & 0x02000000) offset -= 0x04000000; Loading
arch/arm/mach-pxa/pm.c +5 −4 Original line number Diff line number Diff line Loading @@ -155,19 +155,20 @@ int pxa_pm_enter(suspend_state_t state) PSPR = 0; /* restore registers */ RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2); RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); RESTORE(GAFR0_L); RESTORE(GAFR0_U); RESTORE(GAFR1_L); RESTORE(GAFR1_U); RESTORE(GAFR2_L); RESTORE(GAFR2_U); RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2); RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2); RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2); RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); #ifdef CONFIG_PXA27x RESTORE(MDREFR); RESTORE(GAFR3_L); RESTORE(GAFR3_U); RESTORE_GPLEVEL(3); RESTORE(GPDR3); RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3); RESTORE_GPLEVEL(3); RESTORE(GPDR3); RESTORE(GAFR3_L); RESTORE(GAFR3_U); RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3); RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER); RESTORE(PFER); RESTORE(PKWR); #endif Loading
arch/ia64/kernel/process.c +2 −0 Original line number Diff line number Diff line Loading @@ -721,11 +721,13 @@ flush_thread (void) /* drop floating-point and debug-register state if it exists: */ current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID); ia64_drop_fpu(current); #ifdef CONFIG_IA32_SUPPORT if (IS_IA32_PROCESS(ia64_task_regs(current))) { ia32_drop_partial_page_list(current); current->thread.task_size = IA32_PAGE_OFFSET; set_fs(USER_DS); } #endif } /* Loading
drivers/ide/Kconfig +1 −9 Original line number Diff line number Diff line Loading @@ -807,14 +807,6 @@ config BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX endchoice config BLK_DEV_IDE_AU1XXX_BURSTABLE_ON bool "Enable burstable Mode on DbDMA" default false depends BLK_DEV_IDE_AU1XXX help This option enable the burstable Flag on DbDMA controller (cf. "AMD Alchemy 'Au1200' Processor Data Book - PRELIMINARY"). config BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ int "Maximum transfer size (KB) per request (up to 128)" default "128" Loading Loading @@ -940,7 +932,7 @@ config BLK_DEV_Q40IDE config BLK_DEV_MPC8xx_IDE bool "MPC8xx IDE support" depends on 8xx depends on 8xx && IDE=y && BLK_DEV_IDE=y help This option provides support for IDE on Motorola MPC8xx Systems. Please see 'Type of MPC8xx IDE interface' for details. Loading
drivers/ide/ide-cd.c +0 −7 Original line number Diff line number Diff line Loading @@ -1292,7 +1292,6 @@ static ide_startstop_t cdrom_start_seek (ide_drive_t *drive, unsigned int block) struct cdrom_info *info = drive->driver_data; info->dma = 0; info->cmd = 0; info->start_seek = jiffies; return cdrom_start_packet_command(drive, 0, cdrom_start_seek_continuation); } Loading Loading @@ -1344,8 +1343,6 @@ static ide_startstop_t cdrom_start_read (ide_drive_t *drive, unsigned int block) (rq->nr_sectors & (sectors_per_frame - 1))) info->dma = 0; info->cmd = READ; /* Start sending the read request to the drive. */ return cdrom_start_packet_command(drive, 32768, cdrom_start_read_continuation); } Loading Loading @@ -1484,7 +1481,6 @@ static ide_startstop_t cdrom_do_packet_command (ide_drive_t *drive) struct cdrom_info *info = drive->driver_data; info->dma = 0; info->cmd = 0; rq->flags &= ~REQ_FAILED; len = rq->data_len; Loading Loading @@ -1891,7 +1887,6 @@ static ide_startstop_t cdrom_start_write(ide_drive_t *drive, struct request *rq) /* use dma, if possible. we don't need to check more, since we * know that the transfer is always (at least!) frame aligned */ info->dma = drive->using_dma ? 1 : 0; info->cmd = WRITE; info->devinfo.media_written = 1; Loading @@ -1916,7 +1911,6 @@ static ide_startstop_t cdrom_do_block_pc(ide_drive_t *drive, struct request *rq) rq->flags |= REQ_QUIET; info->dma = 0; info->cmd = 0; /* * sg request Loading @@ -1925,7 +1919,6 @@ static ide_startstop_t cdrom_do_block_pc(ide_drive_t *drive, struct request *rq) int mask = drive->queue->dma_alignment; unsigned long addr = (unsigned long) page_address(bio_page(rq->bio)); info->cmd = rq_data_dir(rq); info->dma = drive->using_dma; /* Loading