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Commit 5ad6bf91 authored by Alex Deucher's avatar Alex Deucher Committed by Christian König
Browse files

drm/radeon: fill in set_vce_clocks for CIK asics

parent 58bd2a88
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+35 −0
Original line number Diff line number Diff line
@@ -8925,6 +8925,41 @@ int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk)
	return r;
}

int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk)
{
	int r, i;
	struct atom_clock_dividers dividers;
	u32 tmp;

	r = radeon_atom_get_clock_dividers(rdev, COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK,
					   ecclk, false, &dividers);
	if (r)
		return r;

	for (i = 0; i < 100; i++) {
		if (RREG32_SMC(CG_ECLK_STATUS) & ECLK_STATUS)
			break;
		mdelay(10);
	}
	if (i == 100)
		return -ETIMEDOUT;

	tmp = RREG32_SMC(CG_ECLK_CNTL);
	tmp &= ~(ECLK_DIR_CNTL_EN|ECLK_DIVIDER_MASK);
	tmp |= dividers.post_divider;
	WREG32_SMC(CG_ECLK_CNTL, tmp);

	for (i = 0; i < 100; i++) {
		if (RREG32_SMC(CG_ECLK_STATUS) & ECLK_STATUS)
			break;
		mdelay(10);
	}
	if (i == 100)
		return -ETIMEDOUT;

	return 0;
}

static void cik_pcie_gen3_enable(struct radeon_device *rdev)
{
	struct pci_dev *root = rdev->pdev->bus->self;
+6 −0
Original line number Diff line number Diff line
@@ -203,6 +203,12 @@
#define		CTF_TEMP_MASK				0x0003fe00
#define		CTF_TEMP_SHIFT				9

#define CG_ECLK_CNTL                                    0xC05000AC
#       define ECLK_DIVIDER_MASK                        0x7f
#       define ECLK_DIR_CNTL_EN                         (1 << 8)
#define CG_ECLK_STATUS                                  0xC05000B0
#       define ECLK_STATUS                              (1 << 0)

#define	CG_SPLL_FUNC_CNTL				0xC0500140
#define		SPLL_RESET				(1 << 0)
#define		SPLL_PWRON				(1 << 1)
+2 −0
Original line number Diff line number Diff line
@@ -2076,6 +2076,7 @@ static struct radeon_asic ci_asic = {
		.set_pcie_lanes = NULL,
		.set_clock_gating = NULL,
		.set_uvd_clocks = &cik_set_uvd_clocks,
		.set_vce_clocks = &cik_set_vce_clocks,
		.get_temperature = &ci_get_temp,
	},
	.dpm = {
@@ -2180,6 +2181,7 @@ static struct radeon_asic kv_asic = {
		.set_pcie_lanes = NULL,
		.set_clock_gating = NULL,
		.set_uvd_clocks = &cik_set_uvd_clocks,
		.set_vce_clocks = &cik_set_vce_clocks,
		.get_temperature = &kv_get_temp,
	},
	.dpm = {
+1 −0
Original line number Diff line number Diff line
@@ -717,6 +717,7 @@ u32 cik_get_xclk(struct radeon_device *rdev);
uint32_t cik_pciep_rreg(struct radeon_device *rdev, uint32_t reg);
void cik_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
void cik_sdma_fence_ring_emit(struct radeon_device *rdev,
			      struct radeon_fence *fence);
bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev,