Loading drivers/ata/pata_ixp4xx_cf.c +1 −1 Original line number Diff line number Diff line Loading @@ -56,7 +56,7 @@ static void ixp4xx_mmio_data_xfer(struct ata_device *adev, unsigned char *buf, unsigned int words = buflen >> 1; u16 *buf16 = (u16 *) buf; struct ata_port *ap = adev->ap; void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; void __iomem *mmio = ap->ioaddr.data_addr; struct ixp4xx_pata_data *data = ap->host->dev->platform_data; /* set the expansion bus in 16bit mode and restore Loading drivers/ata/sata_inic162x.c +2 −2 Original line number Diff line number Diff line Loading @@ -192,7 +192,7 @@ static void inic_reset_port(void __iomem *port_base) static u32 inic_scr_read(struct ata_port *ap, unsigned sc_reg) { void __iomem *scr_addr = (void __iomem *)ap->ioaddr.scr_addr; void __iomem *scr_addr = ap->ioaddr.scr_addr; void __iomem *addr; u32 val; Loading @@ -210,7 +210,7 @@ static u32 inic_scr_read(struct ata_port *ap, unsigned sc_reg) static void inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) { void __iomem *scr_addr = (void __iomem *)ap->ioaddr.scr_addr; void __iomem *scr_addr = ap->ioaddr.scr_addr; void __iomem *addr; if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) Loading drivers/ata/sata_promise.c +4 −4 Original line number Diff line number Diff line Loading @@ -382,7 +382,7 @@ static int pdc_sata_port_start(struct ata_port *ap) /* fix up PHYMODE4 align timing */ if (ap->flags & PDC_FLAG_GEN_II) { void __iomem *mmio = (void __iomem *) ap->ioaddr.scr_addr; void __iomem *mmio = ap->ioaddr.scr_addr; unsigned int tmp; tmp = readl(mmio + 0x014); Loading Loading @@ -418,7 +418,7 @@ static void pdc_reset_port(struct ata_port *ap) static int pdc_pata_cable_detect(struct ata_port *ap) { u8 tmp; void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr + PDC_CTLSTAT + 0x03; void __iomem *mmio = ap->ioaddr.cmd_addr + PDC_CTLSTAT + 0x03; tmp = readb(mmio); if (tmp & 0x01) Loading Loading @@ -573,7 +573,7 @@ static void pdc_qc_prep(struct ata_queued_cmd *qc) static void pdc_freeze(struct ata_port *ap) { void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr; void __iomem *mmio = ap->ioaddr.cmd_addr; u32 tmp; tmp = readl(mmio + PDC_CTLSTAT); Loading @@ -585,7 +585,7 @@ static void pdc_freeze(struct ata_port *ap) static void pdc_thaw(struct ata_port *ap) { void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr; void __iomem *mmio = ap->ioaddr.cmd_addr; u32 tmp; /* clear IRQ */ Loading drivers/ata/sata_svw.c +6 −5 Original line number Diff line number Diff line Loading @@ -107,7 +107,7 @@ static u32 k2_sata_scr_read (struct ata_port *ap, unsigned int sc_reg) { if (sc_reg > SCR_CONTROL) return 0xffffffffU; return readl((void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4)); return readl(ap->ioaddr.scr_addr + (sc_reg * 4)); } Loading @@ -116,7 +116,7 @@ static void k2_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, { if (sc_reg > SCR_CONTROL) return; writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4)); writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); } Loading Loading @@ -197,7 +197,8 @@ static void k2_bmdma_setup_mmio (struct ata_queued_cmd *qc) struct ata_port *ap = qc->ap; unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); u8 dmactl; void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; void __iomem *mmio = ap->ioaddr.bmdma_addr; /* load PRD table addr. */ mb(); /* make sure PRD table writes are visible to controller */ writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS); Loading Loading @@ -225,7 +226,7 @@ static void k2_bmdma_setup_mmio (struct ata_queued_cmd *qc) static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; void __iomem *mmio = ap->ioaddr.bmdma_addr; u8 dmactl; /* start host DMA transaction */ Loading Loading @@ -253,7 +254,7 @@ static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc) static u8 k2_stat_check_status(struct ata_port *ap) { return readl((void __iomem *) ap->ioaddr.status_addr); return readl(ap->ioaddr.status_addr); } #ifdef CONFIG_PPC_OF Loading Loading
drivers/ata/pata_ixp4xx_cf.c +1 −1 Original line number Diff line number Diff line Loading @@ -56,7 +56,7 @@ static void ixp4xx_mmio_data_xfer(struct ata_device *adev, unsigned char *buf, unsigned int words = buflen >> 1; u16 *buf16 = (u16 *) buf; struct ata_port *ap = adev->ap; void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; void __iomem *mmio = ap->ioaddr.data_addr; struct ixp4xx_pata_data *data = ap->host->dev->platform_data; /* set the expansion bus in 16bit mode and restore Loading
drivers/ata/sata_inic162x.c +2 −2 Original line number Diff line number Diff line Loading @@ -192,7 +192,7 @@ static void inic_reset_port(void __iomem *port_base) static u32 inic_scr_read(struct ata_port *ap, unsigned sc_reg) { void __iomem *scr_addr = (void __iomem *)ap->ioaddr.scr_addr; void __iomem *scr_addr = ap->ioaddr.scr_addr; void __iomem *addr; u32 val; Loading @@ -210,7 +210,7 @@ static u32 inic_scr_read(struct ata_port *ap, unsigned sc_reg) static void inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) { void __iomem *scr_addr = (void __iomem *)ap->ioaddr.scr_addr; void __iomem *scr_addr = ap->ioaddr.scr_addr; void __iomem *addr; if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) Loading
drivers/ata/sata_promise.c +4 −4 Original line number Diff line number Diff line Loading @@ -382,7 +382,7 @@ static int pdc_sata_port_start(struct ata_port *ap) /* fix up PHYMODE4 align timing */ if (ap->flags & PDC_FLAG_GEN_II) { void __iomem *mmio = (void __iomem *) ap->ioaddr.scr_addr; void __iomem *mmio = ap->ioaddr.scr_addr; unsigned int tmp; tmp = readl(mmio + 0x014); Loading Loading @@ -418,7 +418,7 @@ static void pdc_reset_port(struct ata_port *ap) static int pdc_pata_cable_detect(struct ata_port *ap) { u8 tmp; void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr + PDC_CTLSTAT + 0x03; void __iomem *mmio = ap->ioaddr.cmd_addr + PDC_CTLSTAT + 0x03; tmp = readb(mmio); if (tmp & 0x01) Loading Loading @@ -573,7 +573,7 @@ static void pdc_qc_prep(struct ata_queued_cmd *qc) static void pdc_freeze(struct ata_port *ap) { void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr; void __iomem *mmio = ap->ioaddr.cmd_addr; u32 tmp; tmp = readl(mmio + PDC_CTLSTAT); Loading @@ -585,7 +585,7 @@ static void pdc_freeze(struct ata_port *ap) static void pdc_thaw(struct ata_port *ap) { void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr; void __iomem *mmio = ap->ioaddr.cmd_addr; u32 tmp; /* clear IRQ */ Loading
drivers/ata/sata_svw.c +6 −5 Original line number Diff line number Diff line Loading @@ -107,7 +107,7 @@ static u32 k2_sata_scr_read (struct ata_port *ap, unsigned int sc_reg) { if (sc_reg > SCR_CONTROL) return 0xffffffffU; return readl((void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4)); return readl(ap->ioaddr.scr_addr + (sc_reg * 4)); } Loading @@ -116,7 +116,7 @@ static void k2_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, { if (sc_reg > SCR_CONTROL) return; writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4)); writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); } Loading Loading @@ -197,7 +197,8 @@ static void k2_bmdma_setup_mmio (struct ata_queued_cmd *qc) struct ata_port *ap = qc->ap; unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); u8 dmactl; void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; void __iomem *mmio = ap->ioaddr.bmdma_addr; /* load PRD table addr. */ mb(); /* make sure PRD table writes are visible to controller */ writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS); Loading Loading @@ -225,7 +226,7 @@ static void k2_bmdma_setup_mmio (struct ata_queued_cmd *qc) static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; void __iomem *mmio = ap->ioaddr.bmdma_addr; u8 dmactl; /* start host DMA transaction */ Loading Loading @@ -253,7 +254,7 @@ static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc) static u8 k2_stat_check_status(struct ata_port *ap) { return readl((void __iomem *) ap->ioaddr.status_addr); return readl(ap->ioaddr.status_addr); } #ifdef CONFIG_PPC_OF Loading